Virtualized local storage

• US 9,384,153 B2
• Filed: 08/31/2012
• Issued: 07/05/2016
• Est. Priority Date: 08/31/2012
• Status: Active Grant

• Current Assignee: NXP USA, Inc. (NXP Semiconductors NV)
• Original Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Inventors: Ziolowski, Rodney D., Tkacik, Thomas E., Cannon, Charles E., Covey, Carlin R., Hartley, David H.
• Primary Examiner(s): Zaman, Faisal M
• Application Number:
  US13/601,973
• Publication Number:
  US 20140068133A1
• Time in Patent Office: 1,404 Days
• Field of Search: 710/308, 711/1, 711/2, 711/202, 711/203
• US Class Current: 1/1
• CPC Class Codes: G06F 13/1694 Configuration of memory controller to different memory types

Abstract

Embodiments of electronic circuits, computer systems, and associated methods include a module that accesses memory using virtual addressing, the memory including local memory that is local to the module and nonlocal memory that is accessible via a system bus coupled to the module, the module including logic coupled to the local memory via a local bus. The logic is configured to receive a memory access specified to a virtual address, determine whether the virtual address is within the local memory, and direct the memory access either to the local memory via the local bus or to the nonlocal memory via the system bus based on the determination.

Claims

1. A computer system comprising:

an electronic circuit comprising;

a system bus;

a nonlocal memory coupled to the system bus;

a processor coupled to the system bus;

a module coupled to the system bus, the module comprising;

a local memory, an address comparator, a plurality of base virtual address registers, a plurality of top virtual address registers, and a direct memory access (DMA) controller, wherein

the address comparator is coupled to the local memory via a local bus,

the address comparator is coupled to each of the plurality of base virtual address registers and the plurality of top virtual address registers,

the DMA controller is configured to access the local memory and the nonlocal memory using virtual addressing, independently of the processor; and

a memory management unit (MMU) coupled between the address comparator of the module and the system bus;

wherein

the address comparator is configured to;

receive a first memory access specified to a first received virtual address from the DMA controller, wherein the first memory access is associated with a first software component of a plurality of software components implemented in the computer system,

select a first base virtual address register and a first top virtual address register that are associated with the first software component, wherein the first base virtual address register and the first top virtual address register respectively store a base virtual address and a top virtual address that define a first range of virtual addresses from a plurality of ranges of virtual addresses, wherein each of the plurality of ranges of virtual addresses is assigned to the local memory,

compare the first received virtual address to the base virtual address and to the top virtual address,

in response to a combination of a first determination that the first received virtual address is at or above the base virtual address and a second determination that the first received virtual address is at or below the top virtual address;

 

calculate an offset corresponding to the first received virtual address, and

 

direct the first memory access directly to the local memory via the local bus, using the offset as a physical address in the local memory; and

in response to a third determination that the first received virtual address is below the base virtual address or a fourth determination that the first received virtual address is above the top virtual address;

 

direct the first memory access to the system bus via the MMU, wherein

 

the MMU is configured to translate the first received virtual address of the first memory access into a physical address of the nonlocal memory according to a map for converting virtual addresses to physical addresses; and

the processor is configured to execute instructions including instructions for accessing the local memory and the nonlocal memory.

2. The computer system according to claim 1 further comprising:

executable logic comprising;

at least one operating system that configures the electronic circuit and manages a plurality of processes; and

the plurality of processes that provide context for executables executing on the processor.

3. The computer system according to claim 1 further comprising:

executable logic comprising at least one operating system that creates and manages the map for converting virtual addresses to physical addresses for a plurality of processes, and configures memory management with the map for ones of the plurality of processes, wherein the first received virtual address is translated to the physical address of the nonlocal memory using the map.

4. The computer system according to claim 1 further comprising:

the module further comprising a plurality of portals, a plurality of local memory virtual address registers, and a plurality of local memory partitions; and

executable logic comprising at least one operating system that assigns the plurality of portals selectively to a plurality of processes comprising allocation of the plurality of local memory virtual address registers selectively to the plurality of portals, allocation of the plurality of local memory partitions selectively to the plurality of portals, and configuration of local memory virtual addresses for the plurality of processes.

5. The computer system according to claim 1 further comprising:

executable logic comprising executables that operate the module using instructions dispatched to the module using virtual addresses configured for a plurality of processes.

6. The computer system according to claim 1 further comprising:

executable logic comprising executables configured to operate the module wherein the module further comprises a direct memory access (DMA) controller that uses virtual addressing and the module selectively accesses the local memory and the nonlocal memory using the DMA controller on behalf of the executables.

7. The computer system according to claim 1 further comprising:

the module further comprising a portal; and

executable logic comprising at least one operating system and a plurality of processes wherein the plurality of processes time-share the portal and the at least one operating system resets a local memory virtual address configuration during re-assignment of the portal.

8. The computer system according to claim 1 further comprising:

executable logic comprising;

a plurality of virtual machines that provide context for a respective guest operating system of a plurality of guest operating systems; and

a hypervisor that configures the electronic circuit and manages the plurality of virtual machines, the hypervisor configured to create and manage a map for converting virtual addresses to physical addresses for the plurality of guest operating systems, and configures memory management with the map for ones of the plurality of virtual machines.

9. The computer system according to claim 1 further comprising:

the module further comprising a plurality of portals, a plurality of local memory virtual address registers, and a plurality of local memory partitions; and

executable logic comprising a hypervisor that partitions the local memory and the plurality of portals among a plurality of virtual machines, and configures a local memory virtual address for the plurality of virtual machines in the local memory virtual address registers for an assigned portal of the plurality of portals, the hypervisor configured to assign a virtual machine virtual address to ones of the plurality of virtual machines, the virtual machine virtual address comprising a selected portal and a selected local memory partition.

10. The computer system according to claim 1 further comprising:

executable logic comprising a guest operating system running on a virtual machine that operates the module using guest operating system instructions dispatched to the module using a virtual address configured for the virtual machine.

11. The computer system according to claim 1 further comprising:

the module further comprising a direct memory access (DMA) controller and a portal; and

executable logic comprising a guest operating system running on a virtual machine that accesses the local memory and the nonlocal memory using the DMA controller on behalf of the guest operating system as specified by a virtual address configured for the virtual machine and a portal indicated for making the access.

15. The computer system according to claim 1 wherein:

the plurality of software components comprise at least one of a group including a virtual machine, an executable, an operating system, a hypervisor, and a process.

16. The computer system according to claim 1 wherein the module further comprises:

a first software portal associated with the first software component.

17. The computer system according to claim 1 wherein:

the module further comprises logic that generates a modified virtual address from the first received virtual address by performing addition, subtraction, or truncation and accesses the local memory using the modified virtual address.

18. The computer system according to claim 1 wherein:

the logic is further configured to;

receive a second memory access specified to a second received virtual address, wherein the second memory access is associated with a second software component of the plurality of software components,

select a second base virtual address register and a second top virtual address register that are associated with the second software component, wherein the second base and top virtual address registers respectively store a second base virtual address and a second top virtual address that define a second range of virtual addresses from the plurality of ranges of virtual addresses,

compare the second received virtual address to the second base virtual address and to the second top virtual address,

in response to a combination of a first determination that the second received virtual address is at or above the second base virtual address and a second determination that the second received virtual address is at or below the second top virtual address;

calculate a second offset corresponding to the second received virtual address, and

direct the second memory access directly to the local memory via the local bus, using the second offset as a physical address in the local memory; and

in response to a third determination that the second received virtual address is below the second base virtual address or a fourth determination that the second received virtual address is above the second top virtual address;

direct the second memory access to the system bus via the MMU, wherein

the MMU is further configured to translate the second received virtual address of the second memory access into a physical address of the nonlocal memory according to the map.

12. A method of operating a computer system comprising:

receiving a memory access request specified to a received virtual address from a direct memory access (DMA) controller, wherein the memory access request is associated with a first software component of a plurality of software components implemented in the computer system;

selecting a first base virtual address register and a first top virtual address register that are associated with the first software component, wherein the first base virtual address register and the first top virtual address register respectively store a base virtual address and a top virtual address that define a first range of virtual addresses from a plurality of ranges of virtual addresses, wherein each of the plurality of ranges of virtual addresses is assigned to a local memory, and the first range of virtual addresses is associated with the first software component;

comparing the received virtual address to the base virtual address and to the top virtual address;

in response to a combination of a first determination that the first received virtual address is at or above the base virtual address and a second determination that the first received virtual address is at or below the top virtual address;

calculating an offset corresponding to the first received virtual address, and

directing the memory access to the local memory via a local bus, using the offset as a physical address in the local memory;

in response to a third determination that the first received virtual address is below the base virtual address or a fourth determination that the first received virtual address is above the top virtual address;

directing the memory access to a system bus via a memory management unit (MMU), wherein the system bus is coupled to a nonlocal memory, and the MMU is configured to translate the received virtual address into a physical address of the nonlocal memory according to a map for converting virtual addresses to physical addresses.

13. The method of operating a computer system according to claim 12 further comprising:

executing instructions including instructions for accessing the local memory and the nonlocal memory; and

running an operating system comprising;

configuring components of the computer system;

managing a plurality of processes that provide context for executables executing on the computer system;

creating the map for converting virtual addresses to physical addresses for the plurality of processes;

managing the map;

configuring memory management with the map for the plurality of processes; and

translating the received virtual address to the physical address of the nonlocal memory using the map.

14. The method of operating a computer system according to claim 12 further comprising:

running an operating system comprising;

assigning a plurality of portals selectively to a plurality of processes;

allocating a plurality of local memory virtual address registers selectively to the plurality of portals;

allocating a plurality of local memory partitions selectively to the plurality of portals; and

configuring local memory virtual addresses for the plurality of processes.