Semiconductor device and communication system

• US 9,384,439 B2
• Filed: 06/10/2005
• Issued: 07/05/2016
• Est. Priority Date: 06/14/2004
• Status: Expired due to Fees

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Kato, Kiyoshi
• Primary Examiner(s): KELLY, RAFFERTY D
• Application Number:
  US11/596,806
• Publication Number:
  US 20070241199A1
• Time in Patent Office: 4,043 Days
• Field of Search: 235/492, 257/72
• US Class Current: 1/1
• CPC Class Codes: G02F 1/13338 Input devices, e.g. touch panels
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: G06K 19/07749 the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
• CPC Class Codes: G06K 7/10217 parameter settings controlling the transmission power of the interrogator
• CPC Class Codes: H01L 2223/6677 for antenna, e.g. antenna included within housing of semiconductor device antennas per se H01Q
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 23/66 High-frequency adaptations
• CPC Class Codes: H01L 24/32 of an individual layer connector
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1218 with a particular composition or structure of the substrate
• CPC Class Codes: H01L 27/1222 with a particular composition, shape or crystalline structure of the active layer
• CPC Class Codes: H01L 27/1266 the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
• CPC Class Codes: H01L 29/78678 with inverted-type structure, e.g. with bottom gate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621
• CPC Class Codes: H01L 2924/13069 Thin film transistor [TFT]
• CPC Class Codes: H01L 2924/141 Analog devices
• CPC Class Codes: H01L 2924/1432 Central processing unit [CPU]
• CPC Class Codes: H01L 2924/1579 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy

Abstract

It is an object of the present invention to provide a semiconductor device in which a sophisticated integrated circuit using a polycrystalline semiconductor is formed over a substrate which is weak with heat such as a plastic substrate or a plastic film substrate and a semiconductor device which transmits/receives power or a signal without wires, and a communication system thereof. One feature of the invention is that a semiconductor device, specifically, a processor, in which a sophisticated integrated circuit is fixed to a plastic substrate which is weak with heat by a stripping method such as a stress peel of process method to transmit/receive power or a signal without wires, for example, with an antenna or a light receiving element.

Claims

1. A semiconductor device comprising:

a plastic substrate;

an adhesive agent over the plastic substrate;

a crystallized metal oxide comprising tungsten over the adhesive agent; and

a processor over the crystallized metal oxide, the processor comprising;

an integrated circuit comprising a voltage generation circuit and an arithmetic processing means; and

an antenna connected to the voltage generation circuit,

wherein the voltage generation circuit, the arithmetic processing means, and the antenna are in a layer which is fixed to the plastic substrate by the adhesive agent,

wherein the integrated circuit comprises a thin film transistor,

wherein a power supplied from a plurality of reader/writer devices is supplied to the voltage generation circuit through the antenna,

wherein the power is supplied to the arithmetic processing means,

wherein the arithmetic processing means is configured to perform floating point arithmetic, and

wherein a semiconductor film of the thin film transistor has a thickness of from 10 nm to 200 nm.

2. The semiconductor device according to claim 1, wherein the arithmetic processing means comprises an arithmetic and logic unit and a register.

3. The semiconductor device according to claim 1, wherein the plastic substrate is one selected from a group consisting of polycarbonate, polyarylate, and polyethersulfone.

4. The semiconductor device according to claim 1, wherein the semiconductor device is incorporated into an electronic apparatus selected from a group consisting of a display panel, a computer, a telephone set, an IC tag and an IC card.

5. The semiconductor device according to claim 1, wherein the integrated circuit comprises a storage means and an interface.

6. The semiconductor device according to claim 1, wherein the arithmetic processing means is a central processing unit.

7. The semiconductor device according to claim 1, wherein the processor has translucency.

8. The semiconductor device according to claim 1, wherein the arithmetic processing means further comprises a reservation station which is configured to perform scheduling to execute a decoded instruction.

9. The semiconductor device according to claim 1, wherein the crystallized metal oxide comprises WO₂ or WO₃.

10. A semiconductor device comprising:

a plastic substrate;

an adhesive agent over the plastic substrate;

a crystallized metal oxide comprising tungsten over the adhesive agent; and

a processor over the crystallized metal oxide, the processor comprising;

an integrated circuit comprising a voltage generation circuit and an arithmetic processing means;

an antenna connected to the voltage generation circuit; and

a photodiode,

wherein the voltage generation circuit, the arithmetic processing means, the antenna, and the photodiode are in a layer which is fixed to the plastic substrate by the adhesive agent,

wherein the integrated circuit comprises a thin film transistor,

wherein a power supplied from a plurality of reader/writer devices is supplied to the voltage generation circuit through the antenna,

wherein the power is supplied to the arithmetic processing means,

wherein the arithmetic processing means is configured to perform floating point arithmetic, and

wherein a semiconductor film of the thin film transistor has a thickness of from 10 nm to 200 nm.

11. The semiconductor device according to claim 10, wherein the arithmetic processing means comprises an arithmetic and logic unit and a register.

12. The semiconductor device according to claim 10, wherein the plastic substrate is one selected from a group consisting of polycarbonate, polyarylate, and polyethersulfone.

13. The semiconductor device according to claim 10, wherein the semiconductor device is incorporated into an electronic apparatus selected from a group consisting of a display panel, a computer, a telephone set, an IC tag and an IC card.

14. The semiconductor device according to claim 10, wherein the integrated circuit comprises a storage means and an interface.

15. The semiconductor device according to claim 10, wherein the arithmetic processing means is a central processing unit.

16. The semiconductor device according to claim 10, wherein the processor has translucency.

17. The semiconductor device according to claim 10, wherein the arithmetic processing means further comprises a reservation station which is configured to perform scheduling to execute a decoded instruction.

18. The semiconductor device according to claim 10, wherein the crystallized metal oxide comprises WO₂ or WO₃.

19. A semiconductor device comprising:

a plastic substrate;

an adhesive agent over the plastic substrate;

a crystallized metal oxide comprising tungsten over the adhesive agent; and

a plurality of processors over the crystallized metal oxide, each of the plurality of processors comprising;

an integrated circuit comprising a voltage generation circuit and an arithmetic processing means; and

an antenna connected to the voltage generation circuit,

wherein the plurality of processors are in a layer which is fixed to the plastic substrate by the adhesive agent,

wherein the integrated circuit comprises a thin film transistor,

wherein a power supplied from a reader/writer device is supplied to the voltage generation circuit through the antenna,

wherein the power is supplied to the arithmetic processing means,

wherein the arithmetic processing means is configured to perform floating point arithmetic, and

wherein a semiconductor film of the thin film transistor has a thickness of from 10 nm to 200 nm.

20. The semiconductor device according to claim 19, wherein each of the plurality of processors has translucency.

21. The semiconductor device according to claim 19, wherein the arithmetic processing means further comprises a reservation station which is configured to perform scheduling to execute a decoded instruction.

22. The semiconductor device according to claim 19, wherein the crystallized metal oxide comprises WO₂ or WO₃.