3D semiconductor device and structure
First Claim
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1. A semiconductor device comprising:
- a first layer comprising first transistors comprising at least one first monocrystalline silicon transistor channel;
a second layer comprising second transistors comprising at least one second monocrystalline non-silicon transistor channel;
a plurality of connection paths extending from said second transistors to said first transistors,wherein at least one of said connection paths comprises at least one through layer via with a diameter of less than 200 nm.
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Abstract
A semiconductor device including: a first layer including first transistors including at least one first monocrystalline silicon transistor channel; a second layer including second transistors including at least one second monocrystalline non-silicon transistor channel; a plurality of connection paths extending from the second transistors to the first transistors, where at least one of the connection paths includes at least one through layer via with a diameter of less than 200 nm.
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Citations
20 Claims
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1. A semiconductor device comprising:
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a first layer comprising first transistors comprising at least one first monocrystalline silicon transistor channel; a second layer comprising second transistors comprising at least one second monocrystalline non-silicon transistor channel; a plurality of connection paths extending from said second transistors to said first transistors, wherein at least one of said connection paths comprises at least one through layer via with a diameter of less than 200 nm. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A semiconductor device comprising:
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a first layer comprising first transistors comprising at least one first monocrystalline silicon transistor channel; an interconnection structure between said first transistors comprising a metal layer, said metal layer overlying said first layer; a second layer overlaying said metal layer and comprising second transistors; a plurality of connection paths extending from said second transistors to said first transistors, and at least one repeater comprising said second transistors, wherein said at least one repeater is coupled to said interconnection structure, and wherein said at least one repeater is aligned to said first transistors with less than 200 nm misalignment, and wherein at least one of said connection paths comprise at least one through layer via with a diameter of less than 200 nm. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. A semiconductor device comprising:
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a first layer comprising first transistors, said first transistors comprising at least one first monocrystalline transistor channel; a second layer comprising second transistors, said second transistors comprising at least one second monocrystalline transistor channel; a plurality of connection paths extending from said second transistors to said first transistors, wherein said first monocrystalline transistor channel is Germanium or a III-V semiconductor and said second monocrystalline transistor channel is not Germanium or a III-V semiconductor, and wherein at least one of said connection paths comprise at least one through layer via with a diameter of less than 200 nm. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification