Tipless transistors, short-tip transistors, and methods and circuits therefor
First Claim
1. An integrated circuit, comprising:
- a plurality of first transistors having controllable source-drain current paths coupled between a first and second node, the first transistors having a source drain doping profile with extension regions that extend in a lateral direction under a gate electrode of the first transistors, the first transistors configured to selectively couple a first output node to the first or second node in response to one or more input signals, the first transistors being formed in a substrate and having drawn gate lengths of less than one micron; and
at least one tipless transistor formed in the substrate and having a source-drain current path coupled between the first node and the second node, the tipless transistor having a source drain vertical doping profile without extension regions that extend in a lateral direction under a gate electrode of the tipless transistor, the tipless transistor being configured to selectively couple a second output node to the first or second node in response to the one or more input signals, the tipless transistor having a drawn gate length of less than one micron.
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Accused Products
Abstract
An integrated circuit can include a plurality of first transistors formed in a substrate and having gate lengths of less than one micron and at least one tipless transistor formed in the substrate and having a source-drain path coupled between a circuit node and a first power supply voltage. In addition or alternatively, an integrated circuit can include minimum feature size transistors; a signal driving circuit comprising a first transistor of a first conductivity type having a source-drain path coupled between a first power supply node and an output node, and a second transistor of a second conductivity type having a source-drain path coupled between a second power supply node and the output node, and a gate coupled to a gate of the first transistor, wherein the first or second transistor is a tipless transistor.
258 Citations
19 Claims
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1. An integrated circuit, comprising:
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a plurality of first transistors having controllable source-drain current paths coupled between a first and second node, the first transistors having a source drain doping profile with extension regions that extend in a lateral direction under a gate electrode of the first transistors, the first transistors configured to selectively couple a first output node to the first or second node in response to one or more input signals, the first transistors being formed in a substrate and having drawn gate lengths of less than one micron; and at least one tipless transistor formed in the substrate and having a source-drain current path coupled between the first node and the second node, the tipless transistor having a source drain vertical doping profile without extension regions that extend in a lateral direction under a gate electrode of the tipless transistor, the tipless transistor being configured to selectively couple a second output node to the first or second node in response to the one or more input signals, the tipless transistor having a drawn gate length of less than one micron. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. An integrated circuit device, comprising:
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minimum feature size transistors having gate lengths of less than one micron; a signal driving circuit comprising a first transistor of a first conductivity type having a source-drain path coupled between a first power supply node and an output node; and a second transistor of a second conductivity type having a source-drain path coupled between a second power supply node and the output node, and a gate coupled to a gate of the first transistor;
whereinat least one of the first or second transistor is a tipless transistor having source and drain vertical doping profiles without extension regions that extend in a lateral direction under a gate electrode, and wherein the first and second transistor are formed in a same integrated circuit substrate. - View Dependent Claims (14, 15, 16, 17, 18, 19)
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Specification