Fin field effect transistor (FinFET) device and method for forming the same

• US 9,385,235 B2
• Filed: 05/30/2014
• Issued: 07/05/2016
• Est. Priority Date: 05/30/2014
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Chen, Huang-Kui
• Primary Examiner(s): Lebentritt, Michael
• Application Number:
  US14/291,899
• Publication Number:
  US 20150349125A1
• Time in Patent Office: 767 Days
• Field of Search: 257/347, 257/365, 257/368, 257/401
• US Class Current: 1/1
• CPC Class Codes: H01L 21/28035 the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities H01L21/28105 takes precedence
• CPC Class Codes: H01L 21/32133 by chemical means only
• CPC Class Codes: H01L 21/32139 using masks
• CPC Class Codes: H01L 29/0653 adjoining the input or output region of a field-effect device, e.g. the source or drain region
• CPC Class Codes: H01L 29/1037 and non-planar channel resulting from the gate electrode disposition, e.g. within a trench, H01L29/42356
• CPC Class Codes: H01L 29/41791 for transistors with a horizontal current flow in a vertical sidewall, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/42376 characterised by the length or the sectional shape
• CPC Class Codes: H01L 29/4238 characterised by the surface lay-out
• CPC Class Codes: H01L 29/4916 the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/66545 using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
• CPC Class Codes: H01L 29/66795 with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/785 having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/7851 with the body tied to the substrate

Abstract

A fin field effect transistor (FinFET) device structure and method for forming FinFET device structure are provided. The FinFET structure includes a substrate and a fin structure extending above the substrate. The FinFET structure also includes a gate electrode formed over the fin structure, and the gate electrode has a grid-like pattern when seen from a top-view.

Claims

1. A fin field effect transistor (FinFET) device structure, comprising:

a substrate;

a fin structure extending above the substrate; and

a gate electrode formed over the fin structure, wherein the gate electrode has a plurality of first portions and a plurality of second portions, and wherein the first portions are perpendicular to the second portions.

2. The fin field effect transistor (FinFET) device structure as claimed in claim 1, wherein a plurality of regions are formed by the first portion and the second portion, and the regions are in the shape of a circle, rectangle, ellipse, square, or polygon when seen from a top view.

3. The fin field effect transistor (FinFET) device structure as claimed in claim 1, further comprising:

an inter-layer dielectric (ILD) structure formed between the first portion and the second portion.

4. The fin field effect transistor (FinFET) device structure as claimed in claim 1, further comprising:

a plurality of dummy gate electrodes formed adjacent to the gate electrode.

5. The fin field effect transistor (FinFET) device structure as claimed in claim 1, wherein the gate electrode has a length in a range from about 36 nm to about 360 nm.

6. The fin field effect transistor (FinFET) device structure as claimed in claim 5, further comprising:

a source region and a drain region formed in the fin structure on opposite sides of the gate electrode, wherein a channel region is interposed between the source region and the drain region, and the channel region has a channel length equal to the length of the gate electrode.

7. The fin field effect transistor (FinFET) device structure as claimed in claim 1, further comprising:

a high-k dielectric layer formed underlying the gate electrode; and

a hard mask layer formed on the gate electrode.

8. The fin field effect transistor (FinFET) device structure as claimed in claim 1, further comprising:

an isolation structure formed on the substrate, wherein a portion of the fin structure is embedded in the isolation structure.

16. The fin field effect transistor (FinFET) device structure as claimed in claim 1, further comprising:

a cap layer formed on the gate electrode.

17. The fin field effect transistor (FinFET) device structure as claimed in claim 1, wherein the gate electrode comprises a first material and a second material, wherein the first material and the second material have different etching properties.

18. The fin field effect transistor (FinFET) device structure as claimed in claim 1, wherein the first portions are parallel to the fin structure.

19. The fin field effect transistor (FinFET) device structure as claimed in claim 1, further comprising:

a plurality of dummy gate electrodes formed adjacent to the gate electrode, wherein a pitch between second portions of is equal to a pitch between two adjacent dummy gate electrodes.

9. A fin field effect transistor (FinFET) device structure, comprising:

a substrate;

an isolation structure formed on the substrate;

a plurality of fin structures extending above the substrate, wherein an upper portion of the fin structure protrudes from the isolation structure;

a gate electrode formed over the fin structures, wherein the gate electrode has a plurality of first portions and a plurality of second portions, and the first portions are parallel to the fin structures; and

an inter-layer dielectric (ILD) structure formed on the fin structures, wherein a portion of the ILD structure is directly formed on the isolation structure and between two adjacent first portions of the gate electrode.

10. The fin field effect transistor (FinFET) device structure as claimed in claim 9, wherein the second portions of the gate electrode traverse over the fin structures.

11. The fin field effect transistor (FinFET) device structure as claimed in claim 9, wherein the gate electrode has a grid pattern when seen from a top-view.

12. The fin field effect transistor (FinFET) device structure as claimed in claim 9, further comprising:

a source region and a drain region formed in the fin structure on opposite sides of the gate electrode, wherein a channel region is interposed between the source region and the drain region, and the channel region has a channel length equal to a length of the gate electrode.

13. The fin field effect transistor (FinFET) device structure as claimed in claim 12, wherein the channel length is in a range from about 36 nm to about 360 nm.

14. The fin field effect transistor (FinFET) device structure as claimed in claim 9, further comprising:

a plurality of dummy gate electrodes formed adjacent to the gate electrode.

15. The fin field effect transistor (FinFET) device structure as claimed in claim 14, wherein a pitch between second portions of the gate electrode is equal to a pitch between two adjacent dummy gate electrodes.