Quad-array diode-less RF-to-DC rectifying charge-pump converter for energy harvesting

• US 9,385,625 B1
• Filed: 04/15/2015
• Issued: 07/05/2016
• Est. Priority Date: 04/15/2015
• Status: Active Grant

• Current Assignee: Hong Kong Applied Science And Technology Research Institute Co., Ltd.
• Original Assignee: Hong Kong Applied Science And Technology Research Institute Co., Ltd.
• Inventors: Kwok, Ka Hung, Kwong, Kwok Kuen (David), Lai, Yat Tung
• Primary Examiner(s): Dole, Timothy J
• Assistant Examiner(s): Mehari, Yemane
• Application Number:
  US14/686,923
• Time in Patent Office: 447 Days
• Field of Search: 363/123, 363/125, 363/127, 307/43, 307/104, 307/110, 307/149
• US Class Current: 1/1
• CPC Class Codes: H02M 3/07 using capacitors charged and discharged alternately by semiconductor devices with control electrode , e.g. charge pumps
• CPC Class Codes: H02M 7/103 Containing passive elements (capacitively coupled) which are ordered in cascade on one source
• CPC Class Codes: H02M 7/217 using semiconductor devices only

Abstract

A RF-to-DC converter charges a battery or powers a circuit from the energy of received radio waves. The RF energy received is very small for far-field applications, so the converter is highly sensitive. Four capacitor arrays are arranged in two banks. Buffered RF signals pump bottom plates of the capacitors. A series of L-switches in each bank connect between the two capacitor arrays in that bank. Each L switch has a pre-charge switch that charges that stage'"'"'s input capacitor, and a stage-transfer switch that shares charge from the input capacitor to an output capacitor for that stage. Switches in the two banks alternately pre-charge and pump, with the left bank pumping while the right bank pre-charges. Switches are transistors with substrates tied to their sources or actively driven by substrate control signals. One bank may use n-channel transistors with the other bank uses p-channel transistors. Gate voltages may be boosted.

Claims

1. A RF-to-DC converter comprising:

a first Radio-Frequency (RF) input and a second RF input that receive a RF signal from an antenna;

a buffer circuit for generating a first buffered RF signal and a second buffered RF signal from the first and second RF input, and for generating a first control signal and a second control signal;

wherein the first control signal and the second control signal alternately indicate a pre-charge phase and a pumping phase;

a first array of capacitors having bottom plates receiving the second buffered RF signal;

a second array of capacitors having bottom plates receiving the first buffered RF signal;

a first bank of L-switches, each L-switch coupled between an input capacitor in the second array of capacitors and an output capacitor in the first array of capacitors;

a third array of capacitors having bottom plates receiving the first buffered RF signal;

a fourth array of capacitors having bottom plates receiving the second buffered RF signal;

a second bank of L-switches, each L-switch in the second bank coupled between an input capacitor in the fourth array of capacitors and an output capacitor in the third array of capacitors;

wherein each L-switch comprises;

a pre-charge transistor that charges the input capacitor during the pre-charge phase;

a stage-transfer transistor that transfers charge from the input capacitor to the output capacitor during the pumping phase;

wherein the first control signal and the second control signal are connected to the first bank of L-switches and to the second bank of L-switches to cause the first bank of L-switches to operate in the pre-charge phase when the second bank of L-switches operate in the pumping phase,

whereby the first bank and the second bank operate in opposite phases.

2. The RF-to-DC converter of claim 1 wherein the first control signal and the second control signal have a same frequency as the RF signal.

3. The RF-to-DC converter of claim 2 wherein a first L-switch in the first bank of L-switches has a pre-charge input to the pre-charge transistor that directly connects to the second buffered RF signal;

wherein L-switches in the first bank of L-switches that are not the first L-switch each has a pre-charge input to the pre-charge transistor that connects to an output capacitor of a prior L-switch in the first bank of L-switches;

wherein a first L-switch in the second bank of L-switches has a pre-charge input to the pre-charge transistor that directly connects to the first buffered RF signal;

wherein L-switches in the second bank of L-switches that are not the first L-switch each has a pre-charge input to the pre-charge transistor that connects to an output capacitor of a prior L-switch in the second bank of L-switches.

4. The RF-to-DC converter of claim 3 wherein for the first bank of L-switches, the stage-transfer transistor is an n-channel transistor having a substrate connected to a source, wherein the stage-transfer transistor is formed in an isolated well that is isolated from other transistors;

wherein for the first bank of L-switches, the pre-charge transistor is an n-channel transistor having a substrate connected to a source, wherein the pre-charge transistor is formed in an isolated well that is isolated from other transistors.

5. The RF-to-DC converter of claim 4 wherein the first control signal is applied to a gate of the pre-charge transistor in the first bank of L-switches;

wherein the second control signal is applied to a gate of the stage-transfer transistor in the first bank of L-switches.

6. The RF-to-DC converter of claim 5 wherein for the second bank of L-switches, the stage-transfer transistor is an n-channel transistor having a substrate connected to a source, wherein the stage-transfer transistor is formed in an isolated well that is isolated from other transistors;

wherein for the second bank of L-switches, the pre-charge transistor is an n-channel transistor having a substrate connected to a source, wherein the pre-charge transistor is formed in an isolated well that is isolated from other transistors.

7. The RF-to-DC converter of claim 6 wherein the second control signal is applied to a gate of the pre-charge transistor in the second bank of L-switches;

wherein the first control signal is applied to a gate of the stage-transfer transistor in the second bank of L-switches,

whereby the first control signal and the second control signal are cross-coupled to gates in the second bank of L-switches.

8. The RF-to-DC converter of claim 5 wherein for the second bank of L-switches, the stage-transfer transistor is a p-channel transistor having a substrate connected to a source, wherein the stage-transfer transistor is formed in an isolated well that is isolated from other transistors;

wherein for the second bank of L-switches, the pre-charge transistor is a p-channel transistor having a substrate connected to a source, wherein the pre-charge transistor is formed in an isolated well that is isolated from other transistors.

9. The RF-to-DC converter of claim 8 wherein the first control signal is applied to a gate of the pre-charge transistor in the second bank of L-switches;

wherein the second control signal is applied to a gate of the stage-transfer transistor in the second bank of L-switches.

10. The RF-to-DC converter of claim 3 wherein for the first bank of L-switches, the stage-transfer transistor is an n-channel transistor having a substrate connected to a second substrate control signal, wherein the stage-transfer transistor is formed in an isolated well that is isolated from other transistors;

wherein for the first bank of L-switches, the pre-charge transistor is an n-channel transistor having a substrate connected to a first substrate control signal, wherein the pre-charge transistor is formed in an isolated well that is isolated from other transistors;

wherein the first control signal is applied to a gate of the pre-charge transistor in the first bank of L-switches;

wherein the second control signal is applied to a gate of the stage-transfer transistor in the first bank of L-switches;

wherein for the second bank of L-switches, the stage-transfer transistor is an n-channel transistor having a substrate connected to the first substrate control signal, wherein the stage-transfer transistor is formed in an isolated well that is isolated from other transistors;

wherein for the second bank of L-switches, the pre-charge transistor is an n-channel transistor having a substrate connected to the second substrate control signal, wherein the pre-charge transistor is formed in an isolated well that is isolated from other transistors;

wherein the second control signal is applied to a gate of the pre-charge transistor in the second bank of L-switches;

wherein the first control signal is applied to a gate of the stage-transfer transistor in the second bank of L-switches,

whereby the first control signal and the second control signal are cross-coupled to gates in the second bank of L-switches.

11. The RF-to-DC converter of claim 10 wherein the buffer circuit generates the first substrate control signal with a same polarity as the first control signal, and generates the second substrate control signal with a same polarity as the second control signal,

whereby substrates are actively driven high and low with a same polarity as the gates.

12. The RF-to-DC converter of claim 3 wherein the buffer circuit further comprises:

a break-before-make circuit to generate the first control signal and the second control signal as non-overlapping signals;

a first voltage-booster buffer to drive the first control signal high to a boosted voltage above a power voltage; and

a second voltage-booster buffer to drive the second control signal high to the boosted voltage above the power voltage.

13. The RF-to-DC converter of claim 3 wherein the buffer circuit further comprises:

a first voltage boosting buffer for generating the first control signal with a high-level voltage that is higher than a power voltage;

a second voltage boosting buffer for generating the second control signal with a high-level voltage that is higher than the power voltage;

wherein an output of a last stage in the first bank of L-switches is connected to an output of a last stage in the second bank of L-switches to supply the power voltage.

14. An energy harvesting circuit comprising:

a first plurality of L-switches, each L-switch in the first plurality of L-switches comprising;

a first pre-charge transistor with a channel coupled between a stage input capacitor and a stage input node;

a first stage-transfer transistor with a channel coupled between the stage input capacitor and a stage output;

a second plurality of L-switches, each L-switch in the second plurality of L-switches comprising;

a second pre-charge transistor with a channel coupled between a stage input capacitor and a stage input node;

a second stage-transfer transistor with a channel coupled between the stage input capacitor and a stage output;

a control circuit, receiving an input from an antenna, and generating a first buffered input and a second buffered input, the control circuit also generating a first control signal and a second control signal having a same period as the input from the antenna, wherein the first control signal and the second control signal are non-overlapping alternating signals;

a first array of capacitors each coupled to the second buffered input, the first array of capacitors each also being connected to the stage output of a first stage-transfer transistor of an L-switch in the first plurality of L-switches and to the stage input node of the first pre-charge transistor, wherein a stage output node or a prior L-switch in the first plurality of L-switches connects to a stage input node of a next L-switch in the first plurality of L-switches;

a second array of capacitors each coupled to the first buffered input, the second array of capacitors each also being the stage input capacitor that connects to a first stage-transfer transistor of an L-switch in the first plurality of L-switches;

a third array of capacitors each coupled to the first buffered input, the third array of capacitors each also being connected to the stage output of a second stage-transfer transistor of an L-switch in the second plurality of L-switches and to the stage input node of the second pre-charge transistor, wherein a stage output node or a prior L-switch in the second plurality of L-switches connects to a stage input node of a next L-switch in the second plurality of L-switches;

a fourth array of capacitors each coupled to the second buffered input, the fourth array of capacitors each also being the stage input capacitor that connects to a second stage-transfer transistor of an L-switch in the second plurality of L-switches; and

a power line for powering a circuit or for charging a battery;

wherein the stage output of a last L-switch in the first plurality of L-switches drives the power line;

wherein the stage output of a last L-switch in the second plurality of L-switches also drives the power line.

15. The energy harvesting circuit of claim 14 wherein the first plurality of L-switches comprises at least three L-switches;

wherein the second plurality of L-switches comprises at least three L-switches;

wherein the first pre-charge transistor is an n-channel transistor with a gate receiving the first control signal;

wherein the first stage-transfer transistor is an n-channel transistor with a gate receiving the second control signal.

16. The energy harvesting circuit of claim 15 wherein the second pre-charge transistor is a p-channel transistor with a gate receiving the first control signal;

wherein the second stage-transfer transistor is a p-channel transistor with a gate receiving the second control signal;

wherein the first pre-charge transistor has an isolated substrate connected to the stage input node;

wherein the first stage-transfer transistor has an isolated substrate connected to the stage input capacitor;

wherein the second pre-charge transistor has an isolated substrate connected to the stage input capacitor;

wherein the second stage-transfer transistor has an isolated substrate connected to the stage output.

17. The energy harvesting circuit of claim 15 wherein the second pre-charge transistor is an n-channel transistor with a gate receiving the second control signal;

wherein the second stage-transfer transistor is an n-channel transistor with a gate receiving the first control signal;

wherein the first pre-charge transistor has an isolated substrate connected to the stage input node;

wherein the first stage-transfer transistor has an isolated substrate connected to the stage input capacitor;

wherein the second pre-charge transistor has an isolated substrate connected to the stage input node;

wherein the second stage-transfer transistor has an isolated substrate connected to the stage input capacitor.

18. The energy harvesting circuit of claim 15 further comprising:

a first active substrate control signal, generated by the control circuit to be in phase with the first control signal;

a second active substrate control signal, generated by the control circuit to be in phase with the second control signal;

wherein the first pre-charge transistor has an isolated substrate driven by the first active substrate control signal;

wherein the first stage-transfer transistor has an isolated substrate driven by the second active substrate control signal;

wherein the second pre-charge transistor has an isolated substrate driven by the second active substrate control signal;

wherein the second stage-transfer transistor has an isolated substrate driven by the first active substrate control signal;

whereby substrates are actively driven high and low.

19. A RF-to-DC energy harvester comprising:

an antenna for receiving a Radio-Frequency (RF) signal;

a buffer circuit connected to the antenna to generate a positive buffered RF signal and a negative buffered RF signal, and a first control signal and a second control signal;

a first array of capacitors having bottom plates receiving the negative buffered RF signal;

a second array of capacitors having bottom plates receiving the positive buffered RF signal;

a first bank of L-switches, each L-switch coupled between an input capacitor in the second array of capacitors and an output capacitor in the first array of capacitors;

a third array of capacitors having bottom plates receiving the positive buffered RF signal;

a fourth array of capacitors having bottom plates receiving the negative buffered RF signal;

a second bank of L-switches, each L-switch in the second bank coupled between an input capacitor in the fourth array of capacitors and an output capacitor in the third array of capacitors;

wherein each L-switch comprises;

pre-charge transistor means for charging the input capacitor;

stage-transfer transistor means for transferring charge from the input capacitor to the output capacitor;

first control phase means, in the buffer circuit, for generating the first control signal and the second control signal to activate in the first bank of L-switches the stage-transfer transistor means to conduct and to de-activate the pre-charge transistor means to isolate and not conduct in the first bank of L-switches, and at a same time in the second bank of L-switches activating the pre-charge transistor means to conduct and to de-activate the stage-transfer transistor means to isolate and not conduct; and

second control phase means, in the buffer circuit, for generating the first control signal and the second control signal to activate in the first bank of L-switches the pre-charge transistor means to conduct and to de-activate the stage-transfer transistor means to isolate and not conduct in the first bank of L-switches, and at a same time in the second bank of L-switches activating the stage-transfer transistor means to conduct and to de-activate the pre-charge transistor means to isolate and not conduct;

wherein the first control signal and the second control signal are connected to the first bank of L-switches and to the second bank of L-switches.

20. The RF-to-DC energy harvester of claim 19 further comprising:

first active substrate control means for generating a first substrate control signal that rises with the first control signal rises and falls when the first control signal falls;

second active substrate control means for generating a second substrate control signal that rises with the second control signal rises and falls when the second control signal falls;

wherein the pre-charge transistor means comprises an n-channel transistor having a gate and a substrate that is not shared with other transistors;

wherein the stage-transfer transistor means comprises an n-channel transistor having a gate and a substrate that is not shared with other transistors;

wherein an n-channel transistor receiving the first control signal on the gate also receives the first substrate control signal on the substrate for the n-channel transistor;

wherein for each pre-charge transistor means and for each stage-transfer transistor means, the substrate is actively driven high when the gate is driven high and actively driven low when the gate is driven low,

whereby substrates and gates are actively driven.