Capacitance-to-digital converter utilizing digital feedback and auxiliary DAC
First Claim
1. A capacitance-to-digital converter circuit comprising:
- a capacitor bridge circuit to sense a difference in capacitance between one or more sense capacitors and other capacitors in the bridge circuit;
auxiliary capacitor digital to analog converters (DACs) coupled to the capacitor bridge circuit to reduce a magnitude of an error signal corresponding to the sensed difference;
an analog to digital converter (ADC) coupled to the capacitor bridge circuit and the auxiliary capacitor DACs to convert the error signal whose magnitude is reduced by the auxiliary capacitor DACs to a digital signal;
a digital accumulator coupled to the ADC to accumulate the digital signal from the ADC; and
wherein the auxiliary capacitor DACs are controlled to offset the difference in capacitance between the one or more sense capacitors and the other capacitors in the bridge circuit based on the accumulated digital signal.
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Abstract
A capacitance-to-digital converter circuit utilizes a capacitor bridge circuit to sense a difference in capacitance between sense capacitors and fixed capacitors in the bridge circuit. The sense capacitors vary according to a sensed parameter. Auxiliary capacitor digital to analog converters (DACs) are coupled to the capacitor bridge circuit to cancel the sensed difference. An analog to digital converter (ADC) receives a signal generated by the capacitor bridge circuit and the auxiliary capacitor DACs and converts the received signal to a digital signal. A digital accumulator accumulates the ADC output, whose output represents the difference in capacitance between the sense capacitors and the fixed capacitors. The accumulator output is used to control the auxiliary capacitor DACs to offset the difference in capacitance between the sense capacitors and the fixed capacitors. The accumulator output also provides the basis for the capacitance-to-digital circuit output.
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Citations
21 Claims
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1. A capacitance-to-digital converter circuit comprising:
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a capacitor bridge circuit to sense a difference in capacitance between one or more sense capacitors and other capacitors in the bridge circuit; auxiliary capacitor digital to analog converters (DACs) coupled to the capacitor bridge circuit to reduce a magnitude of an error signal corresponding to the sensed difference; an analog to digital converter (ADC) coupled to the capacitor bridge circuit and the auxiliary capacitor DACs to convert the error signal whose magnitude is reduced by the auxiliary capacitor DACs to a digital signal; a digital accumulator coupled to the ADC to accumulate the digital signal from the ADC; and wherein the auxiliary capacitor DACs are controlled to offset the difference in capacitance between the one or more sense capacitors and the other capacitors in the bridge circuit based on the accumulated digital signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A method comprising:
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sensing a difference in capacitance between one or more sense capacitors and other capacitors in a capacitor bridge circuit; offsetting the sensed difference using auxiliary capacitor digital-to-analog converters (DACs) coupled to the bridge circuit to generate a remaining sensed difference; converting the remaining sensed difference to a digital signal using an analog-to-digital converter (ADC); accumulating the digital signal using a digital accumulator, the accumulated digital signal corresponding to the sensed difference between the one or more sense capacitors and the other capacitors; and controlling the auxiliary capacitor digital-to-analog converters (DACs) based on the accumulated digital signal. - View Dependent Claims (14, 15, 16, 17, 18)
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19. A capacitance-to-digital converter comprising:
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a capacitor bridge circuit including one or more first capacitors that vary according to a sensed parameter and second capacitors, the bridge circuit creating an error signal corresponding to a difference in capacitance between the one or more first capacitors and the second capacitors; one or more auxiliary capacitor digital-to-analog converters (DACs) coupled to the capacitor bridge circuit to offset the difference in capacitance sensed by the capacitor bridge circuit; an analog-to-digital converter (ADC) coupled to the capacitor bridge circuit to supply a digital signal corresponding to the difference in capacitance sensed by the capacitor bridge circuit as offset by the one or more auxiliary capacitor DACs; a feedback capacitance coupled to the digital signal from the ADC to the capacitor bridge circuit to cancel a residual error caused by incomplete cancellation by the one or more auxiliary capacitor DACs of the difference in capacitance between the one or more first capacitors and the second capacitors in the bridge circuit; a digital feedback circuit that includes a digital accumulator to accumulate the difference in capacitance sensed by the capacitor bridge circuit as offset by the one or more auxiliary capacitor DACs and supply an accumulated signal indicative thereof, the accumulated signal corresponding to the difference in capacitance between the one or more first capacitors and the second capacitors; and wherein the digital feedback circuit is further configured to control the one or more auxiliary capacitor DACs to offset the difference in capacitance between the one or more first capacitors and the second capacitors based on the accumulated signal; and wherein the digital feedback circuit is further configured to supply an output of the capacitance-to-digital converter based on the accumulated signal. - View Dependent Claims (20, 21)
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Specification