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Hybrid memory with associative cache

  • US 9,390,020 B2
  • Filed: 07/06/2012
  • Issued: 07/12/2016
  • Est. Priority Date: 07/06/2012
  • Status: Active Grant
First Claim
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1. A device, comprising:

  • a primary memory comprising a host memory space arranged as memory sectors corresponding to host logical block addresses (LBAs);

    a secondary memory implemented as a cache for the primary host memory; and

    a hybrid controller configured to;

    map clusters of host LBAs to clusters of solid state drive (SSD) LBAs, the SSD LBAs corresponding to a memory space of the cache, the mapping of the host LBA clusters to the SSD LBA clusters being fully associative wherein any host LBA cluster can be mapped to any SSD LBA cluster;

    responsive to a promotion request that specifies a cluster aligned host LBA range, use the mapping of the host LBA clusters to the SSD LBA clusters to determine if the host LBA range corresponds to one or more overlapped SSD LBA clusters present in the secondary memory;

    if the host LBA range corresponds to the one or more overlapped SSD LBA clusters, create a bitmap of the overlapped SSD LBA clusters; and

    implement a write operation to the secondary memory using the bitmap to skip writing the overlapped SSD LBA clusters to the secondary memory.

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