Anti-tampering protection assembly

• US 9,390,601 B2
• Filed: 10/03/2014
• Issued: 07/12/2016
• Est. Priority Date: 07/11/2011
• Status: Active Grant

• Current Assignee: Verifone, Inc. (Verifone Systems, Inc.)
• Original Assignee: Verifone, Inc. (Verifone Systems, Inc.)
• Inventors: Sasson, Efi, Ben-Zion, Yuval, Itshakey, Ofer
• Primary Examiner(s): KING, CURTIS J
• Application Number:
  US14/506,044
• Publication Number:
  US 20150022353A1
• Time in Patent Office: 648 Days
• Field of Search: None
• US Class Current: 1/1
• CPC Class Codes: G06F 21/86 Secure or tamper-resistant housings
• CPC Class Codes: G08B 13/22 Electrical actuation

Abstract

An anti-tampering protection assembly for sensing tampering with at least one conductor, the anti-tampering protection assembly including unpredictably varying signal generating circuitry, connected to the at least one conductor, for providing unpredictably varying signals on the at least conductor and tampering sensing circuitry for sensing tampering with the at least one conductor.

Claims

1. An anti-tampering protection assembly for sensing tampering with at least one conductor, said anti-tampering protection assembly comprising:

unpredictably varying signal generating circuitry, connected to said at least one conductor, for providing unpredictably varying signals, which are unpredictable in the sense that a potential tamperer could not ascertain what they are in sufficient time to enable him to emulate them, on said at least one conductor; and

tampering sensing circuitry for sensing tampering with said at least one conductor,

said unpredictably varying signal generating circuitry comprising;

signal generating circuitry; and

topography generation circuitry operative to vary the configuration of an effective circuit through which said signals pass, such that the characteristics of said signals vary unpredictably, said topography generation circuitry including at least one of;

applied signal location selector (ASLS) circuitry, which selects one or more locations at which one or more selected signals from a selected signal generator are applied;

component selector (CS) circuitry, which selects one or more components to be placed in circuit with said one or more selected signals;

component value selector (CVS) circuitry, which selects one or more component values of the selected components to be placed in circuit with said one or more selected signals

voltage level/location selector (VLLS) circuitry, which selects one or more voltage level for one or more ground, power line, and voltage clamp in circuit with said one or more selected signals;

unpredictable signal origin location selector (USOLS) circuitry, which selects one or more locations from which one or more unpredictable signals are supplied to conductors;

unpredictable signal supply location selector (USSLS) circuitry, which selects one or more locations at which one or more unpredictable signals are supplied; and

received signal location selector (RSLS) circuitry, which selects one or more locations at which one or more received signals are received.

2. The anti-tampering protection assembly according to claim 1 and wherein said unpredictably varying signal generating circuitry applies said unpredictably varying signals at various locations along said at least one conductor.

3. The anti-tampering protection assembly according to claim 1 and wherein said unpredictably varying signals include analog signals.

4. The anti-tampering protection assembly according to claim 1 and wherein said tampering sensing circuitry senses tampering with said at least one conductor by sensing changes in said unpredictably varying signals resulting from said tampering.

5. The anti-tampering protection assembly according to claim 1 and wherein said unpredictably varying signal generating circuitry operates by at least one of changing the topology of said unpredictably varying signal generating circuitry and changing at least one applied signal applied thereto.

6. The anti-tampering protection assembly according to claim 5 and wherein said unpredictably varying signal generating circuitry includes circuitry wherein at least one of the following is supplied to said tampering sensing circuitry:

circuit components;

circuit component values;

ground connections;

locations at which said at least one applied signal is applied;

locations from which an unpredictable signal is supplied to said at least one conductor;

locations at which an unpredictable signal is supplied to said at least one conductor; and

locations from which at least one received signal is received.

7. The anti-tampering protection assembly according to claim 1 and wherein said unpredictably varying signal generating circuitry comprises signal generation circuitry having unpredictable input signal generation functionality.

8. The anti-tampering protection assembly according to claim 1 and wherein said at least one conductor comprises multiple disparate grids located at various locations in said unpredictably varying signal generating circuitry.

9. The anti-tampering protection assembly according to claim 1 and wherein said at least one conductor comprises a multiplicity of closely spaced conductors.

10. The An anti-tampering protection assembly according to claim 1 and wherein at least part of said at least one conductor forms part of at least one of a protective circuit, data line and control line.

11. The anti-tampering protection assembly according to claim 1 and wherein at least part of said at least one conductor forms part of at least one of an integrated circuit and a printed circuit board.

12. The anti-tampering protection assembly according to claim 1 and wherein said tampering sensing circuitry comprises a library of stored expected received signals.

13. The anti-tampering protection assembly according to claim 1 and wherein said tampering sensing circuitry comprises calculation functionality for calculating expected received signals.

14. The anti-tampering protection assembly according to claim 13 and wherein said calculation functionality employs Simulation Program with Integrated Circuit Emphasis (SPICE) functionality.

15. The anti-tampering protection assembly according to claim 1 and wherein said tampering sensing circuitry includes a comparator which ascertains a difference between an expected received signal and an actual received signal.

16. The anti-tampering protection assembly according to claim 15 and wherein said assembly is operative in response to exceedance of said threshold to generate a tampering alarm.

17. The anti-tampering protection assembly according to claim 1 and wherein said at least one conductor is physically arranged to at least partially surround an object to be protected and to impede physical access thereto.

18. The anti-tampering protection assembly according to claim 1 and wherein said at least one conductor is connected to said tampering sensing circuitry.

19. The anti-tampering protection assembly according to claim 1 and wherein said at least one conductor is arranged on a protective enclosure in which or on which are located at least one of security-sensitive components storing sensitive data and data lines carrying security-sensitive information.

20. The anti-tampering protection assembly according to claim 1 and wherein said unpredictably varying signal generating circuitry is embodied in circuitry which includes discrete active components.

21. The anti-tampering protection assembly according to claim 1 and wherein said unpredictably varying signal generating circuitry is embodied in a secure keypad device.

22. The anti-tampering protection assembly according to claim 21 and wherein at least part of said unpredictably varying signal generating circuitry is embodied in circuitry which is incorporated in a controller which controls the operation of said secure keypad device.

23. The anti-tampering protection assembly according to claim 1 and wherein said topography generation circuitry includes at least two of said ASLS circuitry, said CS circuitry, said CVS circuitry, said VLLS circuitry, said USOLS circuitry, said USSLS circuitry and said RSLS circuitry.

24. The anti-tampering protection assembly according to claim 1 and wherein said topography generation circuitry includes at least three of said ASLS circuitry, said CS circuitry, said CVS circuitry, said VLLS circuitry, said USOLS circuitry, said USSLS circuitry and said RSLS circuitry.

25. The anti-tampering protection assembly according to claim 1 and wherein said topography generation circuitry includes said ASLS circuitry, said CS circuitry, said CVS circuitry, said VLLS circuitry, said USOLS circuitry, said USSLS circuitry and said RSLS circuitry.

26. The anti-tampering protection assembly according to claim 1 and wherein:

said topography generation circuitry includes said ASLS circuitry; and

said ASLS circuitry provides an applied signal location selection output to at least one applied signal selection switch.

27. The anti-tampering protection assembly according to claim 1 and wherein:

said topography generation circuitry includes said CS circuitry; and

said CS circuitry provides a component selection output to at least one component selection switch.

28. The anti-tampering protection assembly according to claim 27 and wherein said at least one component selection switch includes at least one of a Field-Effect Transistors (FETs), a multiplexer and a demultiplexer.

29. The anti-tampering protection assembly according to claim 1 and wherein:

said topography generation circuitry includes said CVS circuitry; and

said CVS circuitry provides a component value selection output to at least one component value selection switch.

30. The anti-tampering protection assembly according to claim 1 and wherein:

said topography generation circuitry includes said VLLS circuitry; and

said CVS circuitry provides a voltage level/location selection output to at least one voltage level/location selection switch.

31. The anti-tampering protection assembly according to claim 1 and wherein:

said topography generation circuitry includes said USOLS circuitry; and

said one or more locations include one or more grid elements.

32. The anti-tampering protection assembly according to claim 1 and wherein:

said topography generation circuitry includes said USOLS circuitry; and

said USOLS circuitry provides an unpredictable signal origin location selection output to at least one unpredictable signal origin selection switch.

33. The anti-tampering protection assembly according to claim 1 and wherein:

said topography generation circuitry includes said USSLS circuitry; and

said one or more locations include at least one of one or more data lines and one or more grid elements.

34. The anti-tampering protection assembly according to claim 1 and wherein:

said topography generation circuitry includes said USSLS circuitry; and

said USSLS circuitry provides an unpredictable signal supply location selection output to at least one unpredictable signal supply selection switch.

35. The anti-tampering protection assembly according to claim 1 and wherein:

said topography generation circuitry includes said RSLS circuitry; and

said RSLS circuitry provides a received signal location selection output to at least one received signal selection switch.