Semiconductor device and power supply unit utilizing the same

• US 9,391,038 B2
• Filed: 09/23/2014
• Issued: 07/12/2016
• Est. Priority Date: 07/21/2004
• Status: Active Grant

• Current Assignee: ROHM Co., Ltd.
• Original Assignee: ROHM Co., Ltd.
• Inventors: Kitagawa, Atsushi
• Primary Examiner(s): KIM, JUNG H
• Application Number:
  US14/494,335
• Publication Number:
  US 20150021768A1
• Time in Patent Office: 658 Days
• US Class Current: 1/1
• CPC Class Codes: H01L 2224/13014 being circular or elliptic
• CPC Class Codes: H01L 2224/14131 being uniform, i.e. having a uniform pitch across the array
• CPC Class Codes: H01L 24/14 of a plurality of bump connectors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/1305 Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/13091 Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/14 Integrated circuits
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA
• CPC Class Codes: H02M 3/155 using semiconductor devices only
• CPC Class Codes: H02M 3/158 including plural semiconductor devices as final control devices for a single load

Abstract

A semiconductor device has pluralities of grid array terminals forming a grid array structure, e.g. a BGA structure, in which the output end of a built-in switch circuit is connected to multiple terminals of the grid array structure, thereby reducing the current that flows through each of the multiple terminals below a permissible level and minimizing the heat due to contact resistances of the multiple terminals in contact with the IC socket of the semiconductor device. Each pair of nearest neighbors of the multiple terminals is interposed by at least one further array terminal. The multiple terminals are all located at the outermost peripheral terminal positions of the grid array structure. Thus, the heat generated in the respective multiple terminals connected to the switch circuit is reduced, thereby minimizing the possibility of hazardous melting of the terminals.

Claims

1. A semiconductor device comprising grid alley terminals and incorporating a switch circuit composed of a transistor switch, wherein

an output end of the switch circuit is connected to a plurality of terminals out of the grid alley terminals inside the semiconductor device, and the plurality of terminals are connected together outside the semiconductor device.

2. The semiconductor device according to claim 1, wherein the transistor switch is a bipolar transistor.

3. The semiconductor device according to claim 1, wherein the transistor switch is a MOSFET.

4. The semiconductor device according to claim 1, wherein the plurality of terminals are arranged such that at least one other terminal is located between every two of the plurality of terminals.

5. The semiconductor device according to claim 4, wherein the other terminal is a terminal in which no current, or only an extremely small current compared with a current passing through the switch circuit, passes.

6. The semiconductor device according to claim 4, wherein the plurality of terminals are all outermost peripheral terminals among the grid alley terminals.

7. The semiconductor device according to claim 1, wherein the grid alley terminals are ball grid alley terminals.

8. The semiconductor device according to claim 1,

further comprising a drive circuit which turns the transistor switch on and off,

wherein as the switch circuit is turned on and off, an input voltage is converted into an output voltage, which is output.