Calibration methods and circuits to calibrate drive current and termination impedance
First Claim
1. An integrated circuit (IC) chip comprising:
- transceiver circuits, each including a driver circuit to transmit data, a receiver circuit to receive data, each driver circuit including an on-die termination element exhibiting a termination impedance;
a termination control circuit coupled to the transceiver circuits, the termination control circuit to calibrate the termination impedances and a voltage swing of the driver circuits, the termination control circuit including;
a reference-impedance pad to couple to a reference resistor external to the chip;
a reference-voltage pad to couple to a reference voltage source external to the chip;
a comparator to compare a reference-resistor voltage on the reference-impedance pad with an external reference voltage on the reference-voltage pad and develop first control settings responsive to the comparison; and
an adjustable impedance, coupled to the comparator, the comparator to compare the reference-resistor voltage on the reference-voltage pad with a voltage from the adjustable impedance to develop second control settings responsive to the comparison between the reference-resistor voltage and the voltage from the adjustable impedance; and
a bus extending between the termination control circuit and the transceiver circuits, the bus to communicate the first control settings to the transceiver circuits.
1 Assignment
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Accused Products
Abstract
Described are on-die termination (ODT) systems and methods that facilitate high-speed communication between a driver die and a receiver die interconnected via one or more signal transmission lines. An ODT control system in accordance with one embodiment calibrates and maintains termination resistances and drive currents to produce optimal output swing voltages. Comparison circuitry employed to calibrate the reference resistance is also used to calibrate the drive current. Termination elements in some embodiments are divided into two adjustable resistive portions, both of which are designed to minimize capacitive loading. One portion is optimized to produce a relatively high range of adjustment, while the other is optimized for fine-tuning and glitch-free switching.
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Citations
19 Claims
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1. An integrated circuit (IC) chip comprising:
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transceiver circuits, each including a driver circuit to transmit data, a receiver circuit to receive data, each driver circuit including an on-die termination element exhibiting a termination impedance; a termination control circuit coupled to the transceiver circuits, the termination control circuit to calibrate the termination impedances and a voltage swing of the driver circuits, the termination control circuit including; a reference-impedance pad to couple to a reference resistor external to the chip; a reference-voltage pad to couple to a reference voltage source external to the chip; a comparator to compare a reference-resistor voltage on the reference-impedance pad with an external reference voltage on the reference-voltage pad and develop first control settings responsive to the comparison; and an adjustable impedance, coupled to the comparator, the comparator to compare the reference-resistor voltage on the reference-voltage pad with a voltage from the adjustable impedance to develop second control settings responsive to the comparison between the reference-resistor voltage and the voltage from the adjustable impedance; and a bus extending between the termination control circuit and the transceiver circuits, the bus to communicate the first control settings to the transceiver circuits. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A termination calibration method for transceiver circuits on an integrated circuit die, each transceiver including a driver to transmit data and a receiver to receive data, each driver including an on-die termination element, the method comprising:
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drawing a current through an external reference resistor coupled to the die; adjusting the current through the external reference resistor to develop a termination voltage; drawing the adjusted current through an internal reference resistor integrated with the die, the internal reference resistor exhibiting an adjustable impedance; adjusting the adjustable impedance to develop an internal impedance; and replicating the adjusted current and the adjusted impedance at each of the transceiver circuits. - View Dependent Claims (11, 12, 13, 14, 15, 16)
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17. An integrated circuit (IC) chip comprising:
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transceiver circuits, each including a driver circuit to transmit data and a receiver circuit to receive data, each driver circuit including an on-die termination element exhibiting a termination impedance; means for calibrating the termination impedances and a voltage swing of the driver circuits, the means for calibrating including; means for receiving a reference voltage from a voltage source external to the chip; and means for adjusting a current through an external reference resistor external to the chip based on a difference between the reference voltage and a voltage of the external reference resistor, and for adjusting a resistance through an internal reference resistor passing the adjusted current; and means for replicating the adjusted current and the adjusted resistance at each of the transceiver circuits. - View Dependent Claims (18, 19)
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Specification