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Optimization of integrated circuit reliability

  • US 9,395,403 B2
  • Filed: 10/28/2013
  • Issued: 07/19/2016
  • Est. Priority Date: 10/28/2013
  • Status: Expired due to Fees
First Claim
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1. A method for optimizing reliability of integrated circuits, the method comprising:

  • a computer integrating a per-chip equivalent oxide thickness (EOT) circuit sensor into an integrated circuit, wherein the integrated circuit is included in a plurality of integrated circuit chips included in a semiconductor wafer, such that each integrated circuit chip includes one or more per-chip equivalent oxide thickness (EOT) circuit sensor(s);

    the computer utilizing the per-chip EOT circuit sensor to determine electrical characteristics of the integrated circuit;

    the computer determining physical attributes of the integrated circuit as a function of the determined electrical characteristics; and

    the computer accessing EOT sensor circuit data stored in a database and using the EOT sensor circuit data to calculate an oxide thickness value for subsequent reliability modeling of the integrated circuit.

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