Circuit and method for controlling charge injection in radio frequency switches
First Claim
1. A switch circuit, comprising:
- (a) a plurality of switching transistors, each having a gate configured to be coupled to a gate control signal and a gate-controlled channel, coupled in series through their respective gate-controlled channels to selectively convey a signal from an input of the series coupled switching transistors to an output of the series coupled switching transistors, the series of switching transistors including;
(1) a plurality of resistively-isolated nodes, each resistively-isolated node located between a different pair of the switching transistors in series; and
(2) at least one non-resistively-isolated node located adjacent to one of the plurality of the switching transistors in series;
and(b) a plurality of charge injection control transistors, each control transistor having a gate configured to be coupled to a charge injection control signal and a gate-controlled channel operatively coupled between a different one of the plurality of resistively-isolated nodes and the at least one non-resistively-isolated node to selectively communicate injected charge from the different one of the plurality of resistively-isolated nodes to the at least one non-resistively-isolated node;
wherein each control transistor selectively switches between an OFF-state and an ON-state in response to application of the charge injection control signal, and selectively controls communication of injection charge only while in the ON-state.
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Abstract
A circuit and method for controlling charge injection in a circuit are disclosed. In one embodiment, the circuit and method are employed in a semiconductor-on-insulator (SOI) Radio Frequency (RF) switch. In one embodiment, an SOI RF switch comprises a plurality of switching transistors coupled in series, referred to as “stacked” transistors, and implemented as a monolithic integrated circuit on an SOI substrate. Charge injection control elements are coupled to receive injected charge from resistively-isolated nodes located between the switching transistors, and to convey the injected charge to at least one node that is not resistively-isolated. In one embodiment, the charge injection control elements comprise resistors. In another embodiment, the charge injection control elements comprise transistors. A method for controlling charge injection in a switch circuit is disclosed whereby injected charge is generated at resistively-isolated nodes between series coupled switching transistors, and the injected charge is conveyed to at least one node of the switch circuit that is not resistively-isolated.
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Citations
20 Claims
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1. A switch circuit, comprising:
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(a) a plurality of switching transistors, each having a gate configured to be coupled to a gate control signal and a gate-controlled channel, coupled in series through their respective gate-controlled channels to selectively convey a signal from an input of the series coupled switching transistors to an output of the series coupled switching transistors, the series of switching transistors including; (1) a plurality of resistively-isolated nodes, each resistively-isolated node located between a different pair of the switching transistors in series; and (2) at least one non-resistively-isolated node located adjacent to one of the plurality of the switching transistors in series; and (b) a plurality of charge injection control transistors, each control transistor having a gate configured to be coupled to a charge injection control signal and a gate-controlled channel operatively coupled between a different one of the plurality of resistively-isolated nodes and the at least one non-resistively-isolated node to selectively communicate injected charge from the different one of the plurality of resistively-isolated nodes to the at least one non-resistively-isolated node; wherein each control transistor selectively switches between an OFF-state and an ON-state in response to application of the charge injection control signal, and selectively controls communication of injection charge only while in the ON-state. - View Dependent Claims (2, 3, 4, 13, 16)
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5. A method of controlling charge injection in a switch circuit, including:
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(a) employing a plurality of switching transistors, each having a gate configured to be coupled to a gate control signal and a gate-controlled channel, and being coupled in series through their respective gate-controlled channels, to selectively convey a signal from an input of the series coupled switching transistors to an output of the series coupled switching transistors;
the series of switching transistors including;(1) a plurality of resistively-isolated nodes, each resistively-isolated node located between a different pair of the switching transistors in series; and (2) at least one non-resistively-isolated node located adjacent to one of the plurality of the switching transistors in series; (b) generating injected charge at the plurality of resistively-isolated nodes; (c) operatively coupling one of a plurality of charge injection control transistors, each control transistor having a gate configured to be coupled to a charge injection control signal and a gate-controlled channel, between a different one of the plurality of resistively-isolated nodes and the at least one non-resistively-isolated node to selectively communicate injected charge from the different one of plurality of resistively-isolated nodes to the at least one non-resistively-isolated node; and (d) selectively switching each control transistor between an OFF-state and an ON-state in response to application of the charge injection control signal, and selectively controlling communication of injection charge only while in the ON-state. - View Dependent Claims (6, 7, 8, 14, 17)
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9. A switch circuit, including:
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(a) a plurality of switching transistors, each having a gate configured to be coupled to a gate control signal and a gate-controlled channel, coupled in series through their respective gate-controlled channels to selectively convey a signal from an input of the series coupled switching transistors to an output of the series coupled switching transistors;
the series of switching transistors including;(1) a plurality of gate resistors, wherein a gate of each switching transistor is connected to a corresponding one of the plurality of gate resistors, and wherein each gate resistor is connected to a control line that conveys a control signal to the gate of each corresponding switching transistor; (2) a plurality of resistively-isolated nodes, each resistively-isolated node located between a different pair of the switching transistors in series; and (3) at least one non-resistively-isolated node located adjacent to one of the plurality of the switching transistors in series; (b) means for generating injected charge at the plurality of resistively-isolated nodes; and (c) control transistor switching means, operatively coupled to the generating means, each control transistor switching means having a gate configured to be coupled to a charge injection control signal and a gate-controlled channel, for selectively communicating injected charge from the different one of plurality of resistively-isolated nodes to the at least one non-resistively-isolated node, (d) wherein each control transistor switching means selectively switches between an OFF-state and an ON-state in response to application of the charge injection control signal, and selectively controls communication of injection charge only while in the ON-state. - View Dependent Claims (10, 11, 12, 15, 18)
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19. A radio-frequency (RF) signal switching circuit implemented as a monolithic integrated circuit (IC) on a semiconductor-on-insulator (SOI) substrate, including:
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(a) a plurality of signal switching MOSFET transistors, each MOSFET transistor having (A) a gate coupled to a gate resistor configured to be coupled to a gate control signal, each gate resistor having a resistance of approximately Rg, and (B) a gate-controlled channel, wherein the plurality of signal switching MOSFET transistors are coupled in series through their respective gate-controlled channels to selectively convey, in response to the gate control signal, an RF signal from an input of the series-coupled signal switching MOSFET transistors to an output of the series-coupled signal switching MOSFET transistors, the series-coupled signal switching MOSFET transistors further including; (1) a plurality of resistively-isolated nodes, each resistively-isolated node located between a different pair of the series-coupled signal switching MOSFET transistors and receiving injected charge when the plurality of series-coupled signal switching MOSFET transistors is switched from an ON state to an OFF state; and (2) at least one non-resistively-isolated node located adjacent to one of the plurality series-coupled signal switching MOSFET transistors; and (b) a plurality of charge injection control resistors, each charge injection control resistor operatively coupled between a different one of the plurality of resistively-isolated nodes and the at least one non-resistively-isolated node to continuously communicate received injected charge from the different one of the plurality of resistively-isolated nodes to the at least one non-resistively-isolated node, each charge injection control resistor having a resistance Rc approximately equal to Rg/N, wherein N is the number of transistors in the plurality of series-coupled signal switching MOSFET transistors. - View Dependent Claims (20)
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Specification