Reliable diversity architecture for a mobile DTV system
First Claim
1. An apparatus for receiving a digital data stream comprising:
- a demodulator that receives the digital data stream and demodulates the digital data stream, the digital data stream comprising alternating groups of information blocks and groups of parity blocks, each block comprising a plurality of packets, each packet comprising 187 bytes, each group of information blocks being followed by a group of parity blocks, each group of parity blocks being followed by a group of information blocks, each group of information blocks including a plurality of information blocks and each group of parity blocks including a plurality of parity blocks, wherein each parity block contains only parity packets;
an equalizer, that compensates for distortions in the digital data stream to generate a compensated digital data stream;
a delay buffer, that generates a first stream of digital data representing the compensated digital data stream and a second stream of digital data representing the compensated digital data stream delayed for a delay period;
a forward error correction block, that receives and processes the first and second streams of digital data from the delay buffer, and outputs an error corrected stream of digital data, wherein a first information block in the group of information blocks and a corresponding first parity block in the group of parity blocks together form a potential codeword for an error correction serial concatenated packet block code and the delay buffer and forward error correction block align said first information block in the first stream of digital data with said corresponding first parity block in the second stream of digital data for decoding in a packet block decoder; and
a transport block, that receives and processes the error corrected stream from the forward error correction block for display.
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Accused Products
Abstract
A digital data stream comprises alternating groups of information blocks and groups of parity blocks, each group of information blocks includes multiple information blocks and each group of parity blocks includes multiple parity blocks. An apparatus for receiving a digital data stream comprises a demodulator that receives and demodulates a digital data stream. An equalizer compensates for distortions in the digital data stream. A delay buffer generates a first stream of digital data representing the compensated digital data stream and a second stream of digital data representing a delayed version of the compensated digital data stream. A forward error correction block receives and processes the first and second streams of digital data from the delay buffer, and outputs an error corrected stream of digital data. A transport block receives and processes the error corrected stream from the forward error correction block for display.
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Citations
20 Claims
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1. An apparatus for receiving a digital data stream comprising:
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a demodulator that receives the digital data stream and demodulates the digital data stream, the digital data stream comprising alternating groups of information blocks and groups of parity blocks, each block comprising a plurality of packets, each packet comprising 187 bytes, each group of information blocks being followed by a group of parity blocks, each group of parity blocks being followed by a group of information blocks, each group of information blocks including a plurality of information blocks and each group of parity blocks including a plurality of parity blocks, wherein each parity block contains only parity packets; an equalizer, that compensates for distortions in the digital data stream to generate a compensated digital data stream; a delay buffer, that generates a first stream of digital data representing the compensated digital data stream and a second stream of digital data representing the compensated digital data stream delayed for a delay period; a forward error correction block, that receives and processes the first and second streams of digital data from the delay buffer, and outputs an error corrected stream of digital data, wherein a first information block in the group of information blocks and a corresponding first parity block in the group of parity blocks together form a potential codeword for an error correction serial concatenated packet block code and the delay buffer and forward error correction block align said first information block in the first stream of digital data with said corresponding first parity block in the second stream of digital data for decoding in a packet block decoder; and a transport block, that receives and processes the error corrected stream from the forward error correction block for display. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. An apparatus for decoding a digital data stream comprising:
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a first subcore, that processes a first stream of digital data producing a first processed stream of digital data, the digital data stream comprising alternating groups of information blocks and groups of parity blocks, each block comprising a plurality of packets, each packet comprising 187 bytes, each group of information blocks being followed by a group of parity blocks, each group of parity blocks being followed by a group of information blocks, each group of information blocks including a plurality of information blocks and each group of parity blocks including a plurality of parity blocks, wherein each parity block contains only parity packets; a second subcore, that processes a second stream of digital data producing a second processed stream of digital data; a stagger multiplexer, that generates a combined stream of digital data from the first and second processed streams of digital data, wherein a first information block in the group of information blocks and a corresponding first parity block in the group of parity blocks together form a potential codeword for an error correction serial concatenated packet block code and said first information block in the first stream of digital data is aligned with said corresponding first parity block in the second stream of digital data for decoding in a packet block decoder; and a stagger demultiplexer, that processes the combined stream of digital data to generate a first stream and a second stream of extrinsic digital data; wherein the first subcore further processes the first stream of extrinsic digital data to output a third digital data stream, the second subcore further processes the second stream of extrinsic digital data to output a fourth digital data stream, and the first and third streams are provided to a first subcore of a subsequent forward error correction core of the plurality of forward error correction cores and the second and fourth streams are provided to a second subcore of the subsequent forward error correction core. - View Dependent Claims (10, 11)
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12. A method for receiving a digital data stream comprising:
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demodulating, in a demodulator, the digital data stream producing a demodulated digital data stream, the digital data stream comprising alternating groups of information blocks and groups of parity blocks, each block comprising a plurality of packets, each packet comprising 187 bytes, each group of information blocks being followed by a group of parity blocks, each group of parity blocks being followed by a group of information blocks, each group of information blocks including a plurality of information blocks and each group of parity blocks including a plurality of parity blocks, wherein each parity block contains only parity packets; compensating, with an equalizer, the demodulated digital data stream for distortions producing a compensated digital data stream; generating, with a delay buffer, a first stream of digital data representing the compensated digital data stream and a second stream of digital data representing the compensated digital data stream delayed for a delay period; processing, with a forward error correction block, the first and second streams of digital data to generate an error corrected stream of digital data, wherein a first information block in the group of information blocks and a corresponding first parity block in the group of parity blocks together form a potential codeword for an error correction serial concatenated packet block code and the forward error correction block aligns said first information block in the first stream of digital data with said corresponding first parity block in the second stream of digital data for decoding in a packet block decoder; transmitting, the error corrected stream of digital data for display. - View Dependent Claims (13, 14, 15, 16, 17, 18)
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19. A method for decoding a digital data stream comprising:
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processing, in a first subcore, a first stream of digital data producing a first processed stream of digital data, the digital data stream comprising alternating groups of information blocks and groups of parity blocks, each block comprising a plurality of packets, each packet comprising 187 bytes, each group of information blocks being followed by a group of parity blocks, each group of parity blocks being followed by a group of information blocks, each group of information blocks including a plurality of information blocks and each group of parity blocks including a plurality of parity blocks, wherein each parity block contains only parity packets; processing, in a second subcore, a second stream of digital data producing a second processed stream of digital data; generating, in a stagger multiplexer, a combined stream of digital data from the first and second processed streams of digital data, wherein a first information block in the group of information blocks and a corresponding first parity block in the group of parity blocks together form a potential codeword for an error correction serial concatenated packet block code and said first information block in the first stream of digital data is aligned with said corresponding first parity block in the second stream of digital data for decoding in a packet block decoder; and processing, in a stagger demultiplexer, the combined stream of digital data to generate a first stream and a second stream of extrinsic digital data, further comprising; generating the one stream of extrinsic digital data by extracting individual information blocks from the combined stream of digital data to form groups of information blocks with zero blocks between each group of information blocks; and generating the other stream of extrinsic digital data by extracting individual parity blocks from the combined stream of digital data to form groups of parity blocks with zero blocks between each group of parity blocks, further comprising; processing, in the first subcore the first stream of extrinsic digital data to output a third digital data stream; processing, in the second subcore, the second stream of extrinsic digital data to output a fourth digital data stream; and providing the first and third streams to a first subcore of a subsequent forward error correction core of the plurality of forward error correction cores, and the second and fourth streams to a second subcore of the subsequent forward error correction core. - View Dependent Claims (20)
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Specification