Directed route load/store packets for distributed switch initialization

• US 9,397,851 B2
• Filed: 12/16/2014
• Issued: 07/19/2016
• Est. Priority Date: 03/15/2013
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Flynn, William T., Kirscht, Joseph A., Walk, Bruce M.
• Primary Examiner(s): Elliott, IV, Benjamin H
• Assistant Examiner(s): Nowlin, Eric
• Application Number:
  US14/572,507
• Publication Number:
  US 20150139239A1
• Time in Patent Office: 581 Days
• Field of Search: None
• US Class Current: 1/1
• CPC Class Codes: H04L 12/28 characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks] wireless communication networks H04W ; arrangements for dividing the transmission path H04W40/00
• CPC Class Codes: H04L 12/4625 Single bridge functionality, e.g. connection of two networks over a single bridge
• CPC Class Codes: H04L 12/66 Arrangements for connecting between networks having differing types of switching systems, e.g. gateways
• CPC Class Codes: H04L 41/0896 Bandwidth or capacity management, i.e. automatically increasing or decreasing capacities flow or congestion control using dynamic resource allocation, e.g. in-call renegotiation, H04L47/76
• CPC Class Codes: H04L 41/0897 by horizontal or vertical scaling of resources, or by migrating entities, e.g. virtual resources or entities
• CPC Class Codes: H04L 45/04 Interdomain routing, e.g. hierarchical routing
• CPC Class Codes: H04L 45/20 Hop count for routing purposes, e.g. TTL
• CPC Class Codes: H04L 45/34 Source routing
• CPC Class Codes: H04L 45/44 Distributed routing
• CPC Class Codes: H04L 45/566 Routing instructions carried by the data packet, e.g. active networks
• CPC Class Codes: H04L 45/74 Address processing for routing
• CPC Class Codes: H04L 49/252 Store and forward routing
• CPC Class Codes: H04L 49/35 Switches specially adapted for specific applications
• CPC Class Codes: H04L 69/22 Parsing or analysis of headers

Abstract

Techniques for transmitting a packet from a source switch module to a destination switch module. Embodiments receive, at a first port of a first switch module, a packet that includes (i) path information specifying a route to the destination switch module, (ii) a set of load/store operations to be executed by the destination switch module and (iii) return path information specifying a route from the destination switch module to the source switch module. Upon determining that the first switch module is the destination switch module, the set of load/store operations are copied from the received packet into an execution buffer for automatic execution. Once the set of load/store operations are executed, embodiments transmit the packet to a second switch module using the first port on which the packet was received.

Claims

1. A method of transmitting a packet from a source switch module to a destination switch module, comprising:

receiving, at a first port of a first switch module of a distributed switch, a first packet that conforms to a first communications protocol and that includes (i) path information specifying a route to the destination switch module, (ii) a set of load/store register operations to be executed by the destination switch module in order to initialize communication links on the destination switch module, thereby enabling communications within the distributed switch according to a second communications protocol different from the first communications protocol and (iii) return path information specifying a route from the destination switch module to the source switch module;

upon determining that the first switch module is the destination switch module, copying the set of load/store register operations from the first packet into an execution buffer for automatic execution;

once the set of load/store register operations are executed, transmitting the first packet to a second switch module using the first port on which the first packet was received; and

subsequent to communication links on the first switch module being initialized, transmitting, from the first switch module and to the second switch module, a second packet that conforms to the second communications protocol.

2. The method of claim 1, wherein the destination switch module is configured to monitor the execution buffer by periodically polling the execution buffer to determine whether any instructions have been written to the execution buffer, and further configured, upon determining that the execution buffer contains one or more load/store register operations, to automatically execute the one or more load/store register operations without requiring user interaction.

3. The method of claim 1, wherein the destination switch module includes one or more registers, and wherein the set of load/store register operations specify at least one of:

(i) a value to be loaded into at least one of the registers and (ii) a value from at least one of the registers to be stored in a memory of the switch module.

4. The method of claim 1, wherein the destination switch module includes one or more ports, and wherein each of the one or more ports is associated with a respective register indicative of whether the port is enable or disabled, and wherein the set of load/store register operations are configured to write values to the one or more registers to disable all of the one or more ports.

5. The method of claim 1, wherein the path information comprises an ordered listing of switch-to-switch link identifiers, and wherein each of the switch-to-switch link identifiers within the ordered listing of switch-to-switch link identifiers corresponds to a respective hop along the path from the source switch module to the destination switch module.

6. The method of claim 1, wherein the return path information comprises an ordered listing of switch-to-switch link identifiers, and wherein each of the switch-to-switch link identifiers within the ordered listing of switch-to-switch link identifiers corresponds to a respective hop along the path from the destination switch module to the source switch module.

7. The method of claim 6, wherein the packet further includes a return hop counter value, configured to be incremented at each hop along the path from the destination switch module to the source switch module.

8. The method of claim 1, wherein the packet is transmitted over an Ethernet communications link, and wherein the packet does not conform to an Open Systems Interconnection (OSI) model.