Display device

• US 9,401,321 B2
• Filed: 10/10/2014
• Issued: 07/26/2016
• Est. Priority Date: 06/29/2010
• Status: Active Grant

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Sagawa, Hiroshi
• Primary Examiner(s): HOANG, QUOC DINH
• Application Number:
  US14/512,028
• Publication Number:
  US 20150028324A1
• Time in Patent Office: 655 Days
• Field of Search: 257/40, 257/59, 257/72, 257/88, 257/93
• US Class Current: 1/1
• CPC Class Codes: H01L 23/50 for integrated circuit devices, e.g. power bus, number of leadsH01L23/482 - H01L23/498 take precedence
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H10K 50/805 Electrodes
• CPC Class Codes: H10K 50/824 combined with auxiliary electrodes
• CPC Class Codes: H10K 59/00 Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
• CPC Class Codes: H10K 59/1201 Manufacture or treatment
• CPC Class Codes: H10K 59/1213 the pixel elements being TFTs
• CPC Class Codes: H10K 59/122 Pixel-defining structures or layers, e.g. banks
• CPC Class Codes: H10K 59/124 Insulating layers formed between TFT elements and OLED elements
• CPC Class Codes: H10K 59/131 Interconnections, e.g. wiring lines or terminals

Abstract

A display device includes, on a substrate, light emitting elements each formed by sequentially stacking a first electrode layer, an organic layer including a light emission layer, and a second electrode layer and arranged in first and second directions which cross each other, a drive circuit including drive elements that drive light emitting elements, and a wiring extending in the first direction, and an insulating layer disposed in a gap region sandwiched by the light emitting elements neighboring in the second direction and having a recess or a projection. The wiring is disposed in an overlap region overlapping with the recess or the projection in the insulating layer in a thickness direction, in the gap region, and the second electrode layers in the light emitting elements neighboring in the second direction are separated from each other by the recess or the projection in the insulating layer.

Claims

1. A display device comprising:

a first light emitting region and a second light emitting region adjacent to the first light emitting region, each of the first and second light emitting regions including

a first electrode formed on a planarization film,

a light emission element formed on the first electrode, and

a second electrode formed on the light emission;

a signal line that propagates an image signal;

a pixel circuit including a first transistor connected to the signal line, and a second transistor that supplies a driving current to the first electrode;

an auxiliary wiring formed on the planarization film;

an insulating element formed on the planarization film and disposed between the first light emitting region and the second light emitting region; and

a projection formed on the insulating element and overlapping with the signal line in a thickness direction,

wherein the auxiliary wiring is electrically connected to the second electrode in a region other than the first and second light emitting regions.

2. The display device according to claim 1, wherein the projection has a sectional shape including two surfaces crossing each other at an acute angle.

3. The display device according to claim 1, wherein the projection and the insulating layer are continuously formed.

4. The display device according to claim 1, wherein the auxiliary wiring is disposed between the first light emitting region and the second light emitting region.

5. A display device comprising:

a first light emitting region and a second light emitting region adjacent to the first light emitting region, each of the first and second light emitting regions including

a first electrode formed on a planarization film,

a light emission element formed on the first electrode, and

a second electrode formed on the light emission;

a signal line that propagates an image signal;

a pixel circuit including a first transistor connected to the signal line, and a second transistor that supplies a driving current to the first electrode;

an auxiliary wiring formed on the planarization film;

an insulating element formed on the planarization film and disposed between the first light emitting region and the second light emitting region; and

a projection formed on the insulating element and overlapping with the signal line in a thickness direction,

wherein the auxiliary wiring is disposed between the first light emitting region and the second light emitting region.

6. The display device according to claim 5, wherein the projection has a sectional shape including two surfaces crossing each other at an acute angle.

7. The display device according to claim 5, wherein the projection and the insulating layer are continuously formed.