Semiconductor device including a diode arranged in a trench

• US 9,401,355 B2
• Filed: 12/16/2011
• Issued: 07/26/2016
• Est. Priority Date: 12/16/2011
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Weyers, Joachim, Mauder, Anton, Hirler, Franz, Meiser, Andreas, Glaser, Ulrich
• Primary Examiner(s): Islam, Mohammad
• Assistant Examiner(s): Chang, Jay C
• Application Number:
  US13/328,371
• Publication Number:
  US 20130153916A1
• Time in Patent Office: 1,684 Days
• Field of Search: 257/173, 257/175, 257/328, 257/355, 257/356
• US Class Current: 1/1
• CPC Class Codes: H01L 27/0255 using diodes as protective elements
• CPC Class Codes: H01L 27/06 including a plurality of individual components in a non-repetitive configuration
• CPC Class Codes: H01L 27/0814 Diodes only
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/861 Diodes
• CPC Class Codes: H01L 29/8611 Planar PN junction diodes
• CPC Class Codes: H01L 29/8725 of the trench MOS barrier type [TMBS]

Abstract

One embodiment of an integrated circuit includes a semiconductor body. In the semiconductor body a first trench region extends into the semiconductor body from a first surface. The integrated circuit further includes a diode including an anode region and a cathode region. One of the anode region and the cathode region is at least partly arranged in the first trench region. The other one of the anode region and the cathode region includes a first semiconductor region adjoining the one of the anode region and the cathode region from outside of the first trench region.

Claims

1. A semiconductor device, comprising:

a semiconductor body including a first trench region extending into the semiconductor body from a first surface of the semiconductor body;

an ESD (electrostatic static discharge) protection diode including an anode region and a cathode region; and

wherein

one of the anode region and the cathode region is at least partly arranged in the first trench region, and

the other one of the anode region and the cathode region includes a first semiconductor region adjoining the one of the anode region and the cathode region from outside of the first trench region,

the semiconductor device further comprising a field plate arranged on the first surface, the field plate overlapping a pn-junction comprising a p-doped region of the anode region abutting an n-doped region of the cathode region at the first surface,

a contact located at the first surface and electrically connected to the one of the anode region and the cathode region at the first surface, and

wherein the field plate and the contact are electrically connected.

2. The semiconductor device of claim 1, wherein a direction of electrical breakdown current between the anode region and the cathode region is a lateral direction parallel to the first surface.

3. The semiconductor device of claim 1, wherein the ESD protection diode includes a positive differential resistance of less than 20 mΩ

×

mm² at a breakdown voltage V_br>

20V and at a temperature T=423K for a whole breakdown current range of 0.1 to 10 A/mm².

4. The semiconductor device of claim 1, wherein at least one of the anode region and the cathode region is electrically connected with a pin.

5. The semiconductor device of claim 1, wherein:

the first semiconductor region is of a first conductivity type; and

the one of the anode region and the cathode region includes a second semiconductor region of a second conductivity type opposite the first conductivity type.

6. The semiconductor device of claim 5, wherein the second semiconductor region includes doped polysilicon.

7. The semiconductor device of claim 5, wherein the first trench region is filled with the second semiconductor region.

8. The semiconductor device of claim 5, wherein a first part of the second semiconductor region, at least one of a dielectric and a metal structure and a second part of the second semiconductor region are arranged in this order along a lateral direction parallel to the first surface.

9. The semiconductor device of claim 1, further comprising:

a contact area to the one of the anode region and the cathode region arranged on the first surface; and

a contact area to the other one of the anode region and the cathode region arranged on a second surface of the semiconductor body opposite the first surface.

10. The semiconductor device of claim 9, wherein:

the contact area to the one of the anode region and the cathode region is electrically coupled to the one of the anode region and the cathode region at a top side of the one of the anode region and the cathode region; and

the contact area to the other one of the anode region and the cathode region is electrically coupled to the other one of the anode region and the cathode region at a bottom side of the other one of the anode region and the cathode region.

11. The semiconductor device of claim 1, further comprising:

a contact area to the one of the anode region and the cathode region arranged on the first surface; and

a contact area to the other one of the anode region and the cathode region arranged on the first surface.

12. The semiconductor device of claim 1, further comprising:

a second trench region extending into the semiconductor body from the first surface; and

wherein

the other one of the anode region and the cathode region is arranged at least partly in the second trench region.

13. The semiconductor device of claim 12, wherein a first depth of the first trench region differs from a second depth of the second trench region.

14. The semiconductor device of claim 12, wherein the second trench region is surrounding the first trench region at the first surface.

15. The semiconductor device of claim 12, wherein the first and second trench regions are arranged parallel to each other along the first surface.

16. The semiconductor device of claim 1, wherein the one of the anode region and the cathode region is a first electrode region arranged in the first trench region, the semiconductor device further comprising a second electrode region arranged in a second trench region.

17. The semiconductor device of claim 16, wherein:

the first electrode region is electrically connected to a first pin; and

the second electrode region is electrically connected to a second pin different from the first pin.

18. The semiconductor device of claim 1, further comprising:

a buried layer adjoining a bottom side of the first semiconductor region, the buried layer including a concentration of dopants that is larger than a concentration of dopants of the first semiconductor region; and

wherein

a conductivity type of the buried layer and the first semiconductor region is the same.

19. The semiconductor device of claim 1, wherein the ESD protection diode is a Schottky diode and the one of the anode region and the cathode region is a Schottky contact material arranged in the first trench region.

20. The semiconductor device of claim 1, further comprising a shallow trench isolation at the first surface in an area of the first semiconductor region.

21. The semiconductor device of claim 1, wherein a lateral width of the first trench region is larger in a bottom part of the first trench region than in a top part of the first trench region.

22. The semiconductor device of claim 12, further comprising:

a plurality of the first trenches and a plurality of the second trenches; and

wherein

a lateral distance between one of the first trenches and a neighboring one of the second trenches differs from a lateral distance between another one of the first trenches and another neighboring one of the second trenches.

23. The semiconductor device of claim 1, further comprising an isolating layer at a bottom side of the first trench.

24. The semiconductor device of claim 1, further comprising:

a semiconductor substrate;

a p-doped semiconductor layer on the semiconductor substrate; and

wherein

the first semiconductor region is arranged in the p-doped semiconductor layer.

25. The semiconductor device of claim 1, further comprising a functional element, and wherein the ESD protection diode covers an area at the first surface in a range between 1000 μ

m² and 1 mm² and configured to protect the functional element against ESD.

26. The semiconductor device of claim 1, further comprising a semiconductor element, and wherein the ESD protection diode is a clamping diode configured to clamp a voltage between two terminals of the semiconductor element.

28. The semiconductor device of claim 1, wherein an insulating layer is arranged between and abuts the pn-junction at the first surface and the field plate.

29. The semiconductor device of claim 1, wherein the first semiconductor region extends parallel to a sidewall of the first trench region, thereby constituting the pn-junction.

27. A semiconductor device, comprising:

a semiconductor body including a first trench extending into the semiconductor body from a first surface of the semiconductor body;

an ESD (electrostatic static discharge) protection diode including an anode region and a cathode region; and

wherein

one of the anode region and the cathode region is at least partly arranged in the first trench,

the other one of the anode region and the cathode region includes a first semiconductor region directly adjoining the one of the anode region and the cathode region from outside of the first trench, thereby constituting a pn-junction in the semiconductor body and extending to the first surface,

the semiconductor device further comprises a second trench at a lateral distance to the first trench and extending into the semiconductor body from the first surface, and

the other one of the anode region and the cathode region is arranged at least partly in the second trench, and

further comprising a conducting path of the ESD diode through a sidewall of the first trench and wherein the pn-junction extends along at least 50% of a depth of the first trench.