Run-time instrumentation indirect sampling by address

• US 9,405,543 B2
• Filed: 03/07/2013
• Issued: 08/02/2016
• Est. Priority Date: 03/16/2012
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Bradbury, Jonathan D., Gainey, Charles W. Jr., Gschwind, Michael K.
• Primary Examiner(s): MITCHELL, JASON D
• Application Number:
  US13/788,368
• Publication Number:
  US 20130246774A1
• Time in Patent Office: 1,244 Days
• Field of Search: None
• US Class Current: 1/1
• CPC Class Codes: G06F 11/3466 Performance evaluation by tracing or monitoring
• CPC Class Codes: G06F 11/348 Circuit details, i.e. tracer hardware
• CPC Class Codes: G06F 11/3612 by runtime analysis performance monitoring G06F11/3466
• CPC Class Codes: G06F 11/362 Software debugging
• CPC Class Codes: G06F 11/3636 by tracing the execution of the program
• CPC Class Codes: G06F 11/3644 by instrumenting at runtime
• CPC Class Codes: G06F 11/3648 using additional hardware
• CPC Class Codes: G06F 11/3664 Environments for testing or debugging software
• CPC Class Codes: G06F 2201/86 Event-based monitoring
• CPC Class Codes: G06F 2201/87 Monitoring of transactions
• CPC Class Codes: G06F 9/3005 to perform operations for flow control
• CPC Class Codes: G06F 9/30058 Conditional branch instructions
• CPC Class Codes: G06F 9/30076 to perform miscellaneous control operations, e.g. NOP
• CPC Class Codes: G06F 9/30145 Instruction analysis, e.g. decoding, instruction word fields
• CPC Class Codes: G06F 9/323 for indirect branch instructions
• CPC Class Codes: G06F 9/45533 Hypervisors; Virtual machine monitors

Abstract

Embodiments of the invention relate to implementing run-time instrumentation indirect sampling by address. An aspect of the invention includes a method for implementing run-time instrumentation indirect sampling by address. The method includes reading sample-point addresses from a sample-point address array, and comparing, by a processor, the sample-point addresses to an address associated with an instruction from an instruction stream executing on the processor. The method further includes recognizing a sample point upon execution of the instruction associated with the address matching one of the sample-point addresses. Run-time instrumentation information is obtained from the sample point. The method also includes storing the run-time instrumentation information in a run-time instrumentation program buffer as a reporting group.

Claims

1. A computer implemented method for implementing run-time instrumentation indirect sampling by address, the method comprising:

initializing a run-time-instrumentation control based on executing a load run-time instrumentation controls (LRIC) instruction, the LRIC instruction establishing a sampling mode and a sample-point address (SPA) control according to a sampling control block included as an operand of the LRIC instruction, the sampling mode selectable to enable an indirect sampling by address mode in combination with a directed sampling mode that triggers sampling upon execution of a next sequential instruction following a run-time instrumentation next instruction, and/or an interval-based sampling mode that triggers sampling at specified intervals;

collecting into a collection buffer that is internal to a processor, a plurality of run-time instrumentation information comprising events and data associated with execution of an instruction stream while the instruction stream is executing on the processor;

reading sample-point addresses from a sample-point address array in a register that is internal to the processor;

comparing, by the processor, the sample-point addresses to an address associated with an instruction from the instruction stream executing on the processor;

recognizing a sample point upon execution of the instruction associated with the address matching one of the sample-point addresses; and

triggering a transfer of the run-time instrumentation information from the collection buffer to a run-time instrumentation program buffer as a reporting group based on recognizing the sample point, wherein the run-time instrumentation program buffer is located in memory that is external to the processor.

2. The method of claim 1, wherein the address associated with the instruction, based on address type, is one of:

an address of the instruction and an address of an operand of the instruction.

3. The method of claim 1, wherein initializing the run-time-instrumentation control based on executing the LRIC instruction further comprises establishing a sample-point address type as one of:

an instruction address and an address of an operand of an instruction.

4. The method of claim 1, further comprising:

fetching a run-time instrumentation load sample point addresses (RILSPA) instruction comprising the sample-point addresses; and

executing the RILSPA instruction by the processor, the executing comprising;

storing the sample-point addresses in the sample-point address array; and

updating a condition code in the processor based on the storing.

5. The method of claim 4, further comprising:

performing an address translation on the sample-point addresses based on a dynamic address translation state prior to storing the sample-point addresses in the sample-point address array.

6. The method of claim 1, further comprising:

fetching a run-time instrumentation store sample point addresses (RISSPA) instruction comprising a storage address; and

executing the RISSPA instruction by the processor, the executing comprising;

reading the sample-point addresses from the sample-point address array; and

storing the sample-point addresses to a location identified by the storage address.

7. The method of claim 1, further comprising:

fetching a run-time instrumentation clear sample point addresses (RICSPA) instruction; and

executing the RICSPA instruction by the processor, the executing comprising

clearing the sample-point addresses in the sample-point address array; and

updating a condition code in the processor based on the clearing.

8. The method of claim 1, further comprising:

determining whether the processor is executing in a transactional-execution mode; and

deferring storage of the reporting group in the run-time instrumentation program buffer until a current transaction ends after recognizing the sample point based on determining that the processor is executing in the transactional-execution mode.

9. The method of claim 8, wherein the storage of the reporting group is purged while the storage is deferred based on receiving an interruption.

10. The method of claim 9, wherein a pending input/output interruption or an external interruption remains pending until the reporting group has been stored or a determination is made that the reporting group cannot be stored.