Green eMMC device (GeD) controller with DRAM data persistence, data-type splitting, meta-page grouping, and diversion of temp files for enhanced flash endurance

• US 9,405,621 B2
• Filed: 06/06/2014
• Issued: 08/02/2016
• Est. Priority Date: 12/28/2012
• Status: Active Grant

• Current Assignee: Super Talent Technology, Corporation
• Original Assignee: Super Talent Technology, Corporation
• Inventors: Yu, Frank, Ma, Abraham C., Chen, Shimon
• Primary Examiner(s): TSAI, SHENG JEN
• Application Number:
  US14/298,808
• Publication Number:
  US 20140310574A1
• Time in Patent Office: 788 Days
• Field of Search: 711/103
• US Class Current: 1/1
• CPC Class Codes: G06F 11/1072 in multilevel memories
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/0804 with main memory updating G06F12/0806 takes precedence
• CPC Class Codes: G06F 12/0871 Allocation or management of cache space
• CPC Class Codes: G06F 2212/401 Compressed data
• CPC Class Codes: G06F 2212/402 Encrypted data
• CPC Class Codes: G06F 2212/7203 Temporary buffering, e.g. using volatile buffer or dedicated buffer blocks
• CPC Class Codes: G06F 2212/7208 Multiple device management, e.g. distributing data over multiple flash devices
• CPC Class Codes: G06F 3/0616 in relation to life time, e.g. increasing Mean Time Between Failures [MTBF]
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G06F 3/0685 Hybrid storage combining heterogeneous device types, e.g. hierarchical storage, hybrid arrays
• CPC Class Codes: G11C 11/56 using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
• CPC Class Codes: G11C 13/0004 comprising amorphous/crystalline phase transition cells
• CPC Class Codes: G11C 2211/5641 Multilevel memory having cells with different number of storage levels
• CPC Class Codes: G11C 29/72 with optimized replacement algorithms
• CPC Class Codes: G11C 29/765 in solid state disks

Abstract

A controller for a Super Enhanced Endurance Device (SEED) or Solid-State Drive (SSD) increases flash endurance using a DRAM buffer. Host accesses to flash are intercepted by the controller and categorized as data types of paging files, temporary files, meta-data, and user data files, using address ranges and file extensions read from meta-data tables. Paging files and temporary files are optionally written to flash. Full-page and partial-page data are grouped into multi-page meta-pages by data type in the DRAM before storage by lower-level flash devices such as eMMC, UFS, or iSSD. Caches in the DRAM buffer for storing each data type are managed and flushed to the flash devices by the controller. Write dates are stored for pages or blocks for management functions. A spare/swap area in DRAM reduces flash wear. Reference voltages are adjusted when error correction fails.

Claims

1. An enhanced-endurance Solid-State Drive (SSD) controller comprising:

a host interface for receiving host reads and host writes from a host;

a data write cache for storing host write data;

a data read cache for storing data for reading by the host;

a grouping engine for grouping data stored in the data write cache into meta-pages;

an un-grouping engine for un-grouping data in stored in meta-pages into ungrouped data for storage in the data read cache;

wherein meta-pages are sent from the grouping engine to a flash memory device, and meta-pages stored in the flash memory device are received by the un-grouping engine;

a multi-channel flash interface for transferring data from the grouping engine in a plurality of stripes for writing to a plurality of flash memory devices, and for reading a plurality of stripes from the plurality of flash memory devices for transfer to the un-grouping engine;

a dynamic-random-access memory (DRAM) buffer interface for interfacing to a DRAM buffer for storing the data write cache, the data read cache, and buffers for the grouping engine and for the un-grouping engine;

a flush manager for flushing data stored in the DRAM buffer to the plurality of flash memory devices when power is lost;

a resume manager for fetching flushed data from the plurality of flash memory devices and fore writing to the DRAM buffer when power is restored;

a file type identifier for generating a data type for a host write received by the host interface from the host;

a data split manager for sorting host write data based on the data type generated by the file type identifier;

wherein the data write cache stores host write data having a user data type;

a meta-data cache, in the DRAM buffer, for storing host write data having a meta-data data type;

a paging cache, in the DRAM buffer, for storing host write data having a paging file data type; and

a temp cache, in the DRAM buffer, for storing host write data having a temp data type;

wherein the temp cache is not flushed to the plurality of flash memory devices by the flush manager;

wherein the meta-data cache is flushed to the plurality of flash memory devices by the flush manager.

2. The enhanced-endurance Solid-State Drive (SSD) controller of claim 1 further comprising:

a Redundant Array of Individual Disks (RAID) manager for arranging data from the grouping engine into the plurality of stripes for writing to the plurality of flash memory devices, and for redundantly storing data across the plurality of flash memory devices wherein data is recoverable from remaining flash memory devices when a flash memory device in the plurality of flash memory devices fails.

3. The enhanced-endurance Solid-State Drive (SSD) controller of claim 1 further comprising:

a first split manager for splitting data received from the plurality of flash memory devices into recently-accessed and non-recently-accessed data;

a second split manager for splitting data received from the plurality of flash memory devices into frequently-accessed and non-frequently-accessed data;

wherein the data read cache further comprises;

a first data read cache for storing frequently-accessed, recently-accessed data for reading by the host;

a second data read cache for storing frequently-accessed, non-recently-accessed data for reading by the host;

a third data read cache for storing non-frequently-accessed, recently-accessed data for reading by the host; and

a fourth data read cache for storing non-frequently-accessed, non-recently-accessed data for reading by the host.

4. The enhanced-endurance Solid-State Drive (SSD) controller of claim 1 further comprising:

an encryption engine, coupled to receive host writes, for generating encrypted data; and

a compression engine, coupled to receive host writes, for generating compressed data.

5. The enhanced-endurance Solid-State Drive (SSD) controller of claim 1 wherein the plurality of flash memory devices each comprise:

a volatile memory buffer for storing grouped meta-pages received from the multi-channel flash interface;

a flash memory for storing grouped meta-pages from the volatile memory buffer;

a flash interface for erasing blocks and writing pages in the flash memory, wherein a block is a multiple of pages in size; and

an error-correction code (ECC) manager for generating ECC code to append to the grouped meta-pages written to the flash memory.

6. The enhanced-endurance Solid-State Drive (SSD) controller of claim 5 wherein the plurality of flash memory devices each further comprise:

a bad page manager for tracking bad pages of the flash memory; and

a wear leveler for assigning new data to empty blocks of the flash memory having a low erase count.

7. The enhanced-endurance Solid-State Drive (SSD) controller of claim 1 wherein the plurality of flash memory devices each comprise an embedded Multi-Media Card (eMMC) flash device, a Universal Flash Storage (UFS) flash device, or an Integrated Solid-State Drive (iSSD) flash device.

8. An enhanced-endurance Solid-State Drive (SSD) comprising:

a dynamic-random-access memory (DRAM) buffer for storing caches and tables;

a plurality of managed flash devices, each managed flash device having a flash memory and a managing controller that manages bad blocks within the flash memory by transferring data from worn or bad blocks within the flash memory to fresh blocks within the flash memory to perform low-level wear leveling and bad block management;

a Super Enhanced Endurance Device (SEED) controller that comprises;

a host interface for receiving host reads and host writes from a host;

a DRAM interface for managing the DRAM buffer, the DRAM buffer having a data write cache for storing host write data and a data read cache for storing data for reading by the host;

a grouping engine for grouping data stored in the data write cache into meta-pages;

an un-grouping engine for un-grouping data in stored in meta-pages into ungrouped data for storage in the data read cache;

wherein meta-pages are sent from the grouping engine to a managed flash device in the plurality of managed flash devices, and meta-pages stored in the managed flash device are received by the un-grouping engine; and

a multi-channel flash interface for transferring data from the grouping engine in a plurality of stripes for writing to the plurality of managed flash devices, and for reading a plurality of stripes from the plurality of managed flash devices for transfer to the un-grouping engine;

wherein the SEED controller further comprises;

a file type identifier for generating a data type for a host write received by the host interface from the host;

a data split manager for sorting host write data based on the data type generated by the file type identifier;

wherein the data write cache stores host write data having a user data type;

a meta-data cache, in the DRAM buffer, for storing host write data having a meta-data data type;

a paging cache, in the DRAM buffer, for storing host write data having a paging file data type;

a temp cache, in the DRAM buffer, for storing host write data having a temp data type;

wherein the temp cache is not flushed to the plurality of managed flash devices;

wherein the meta-data cache is flushed to the plurality of managed flash devices.

9. The enhanced-endurance SSD of claim 8 wherein the plurality of managed flash devices each comprise an embedded Multi-Media Card (eMMC) flash device, a Universal Flash Storage (UFS) flash device, or an Integrated Solid-State Drive (iSSD) flash device.

10. The enhanced-endurance SSD of claim 8 wherein the SEED controller further comprises:

a first split manager for splitting data received from the plurality of managed flash devices into recently-accessed and non-recently-accessed data;

a second split manager for splitting data received from the plurality of managed flash devices into frequently-accessed and non-frequently-accessed data;

wherein the DRAM buffer further comprises;

a first data read cache for storing frequently-accessed, recently-accessed data for reading by the host;

a second data read cache for storing frequently-accessed, non-recently-accessed data for reading by the host;

a third data read cache for storing non-frequently-accessed, recently-accessed data for reading by the host; and

a fourth data read cache for storing non-frequently-accessed, non-recently-accessed data for reading by the host.

11. The enhanced-endurance SSD of claim 10 wherein the SEED controller further comprises:

an encryption engine, coupled to receive host writes, for generating encrypted data; and

a compression engine, coupled to receive host writes, for generating compressed data.

12. The enhanced-endurance SSD of claim 10 wherein the SEED controller further comprises:

a Redundant Array of Individual Disks (RAID) manager for arranging data from the grouping engine into the plurality of stripes for writing to the plurality of managed flash devices, and for redundantly storing data across the plurality of managed flash devices wherein data is recoverable from remaining managed flash devices when a managed flash device in the plurality of managed flash devices fails.

13. The enhanced-endurance SSD of claim 10 wherein each managed flash device in the plurality of managed flash devices further comprises:

a low-level DRAM buffer managed by the managing controller;

a spare/swap area in the low-level DRAM buffer;

wherein the managing controller uses the spare/swap area in the low-level DRAM buffer to merge valid data in the flash memory with new data to generate combined data when over-writing a full page or a partial page of an existing block in the flash memory by writing new data to a spare block in the low-level DRAM buffer related to the existing block in the flash memory, and when the spare block is needed by additional new data for a different block in the flash memory, writing a combination of the spare block with the new data and data from the existing block in the flash memory into a swap block in the flash memory and marking a page status for pages of the existing block in the flash memory as a garbage page.

14. A Solid-State Drive (SSD) comprising:

a plurality of managed flash devices, each managed flash device comprising;

a flash memory

a managing controller that manages bad blocks within the flash memory by transferring data from worn blocks within the flash memory to fresh blocks within the flash memory to perform low-level wear leveling and bad block management;

a low-level flash interface in the managing controller for erasing blocks and writing pages in the flash memory, wherein a block is a multiple of pages in size;

a dynamic-random-access memory (DRAM) buffer for storing tables and caches including a write data cache and a read data cache;

a Super Enhanced Endurance Device (SEED) controller comprising;

a host interface for receiving host reads and host writes from a host;

a DRAM interface for managing the DRAM buffer;

a grouping engine for grouping data stored in the write data cache into meta-pages;

an un-grouping engine for un-grouping data in stored in meta-pages into ungrouped data for storage in the read data cache;

wherein meta-pages are sent from the grouping engine to a managed flash device in the plurality of managed flash devices, and meta-pages stored in the managed flash device are received by the un-grouping engine; and

a striping flash interface for transferring data from the grouping engine in a plurality of stripes for writing to the plurality of managed flash devices, and for reading a plurality of stripes from the plurality of managed flash devices for transfer to the un-grouping engine;

a file type identifier for generating a data type for a host write received by the host interface from the host;

a data split manager for sorting host write data based on the data type generated by the file type identifier;

wherein the write data cache stores host write data having a user data type;

a meta-data cache, in the DRAM buffer, for storing host write data having a meta-data data type;

a paging cache, in the DRAM buffer, for storing host write data having a paging file data type;

a temp cache, in the DRAM buffer, for storing host write data having a temp data type;

wherein the temp cache is not flushed to the plurality of managed flash devices;

wherein the meta-data cache is flushed to the plurality of managed flash device.

15. The SSD of claim 14 wherein the SEED controller further comprises:

a Redundant Array of Individual Disks (RAID) manager for arranging data from the grouping engine into the plurality of stripes for writing to the plurality of managed flash devices, and for redundantly storing data across the plurality of managed flash devices wherein data is recoverable from remaining managed flash devices when a managed flash device in the plurality of managed flash devices fails.

16. The SSD of claim 15 wherein the plurality of managed flash devices each comprise an embedded Multi-Media Card (eMMC) flash device, a Universal Flash Storage (UFS) flash device, or an Integrated Solid-State Drive (iSSD) flash device.

17. The SSD of claim 14 wherein the SEED controller further comprises:

a first split manager for splitting data received from the plurality of managed flash devices into recently-accessed and non-recently-accessed data;

a second split manager for splitting data received from the plurality of managed flash devices into frequently-accessed and non-frequently-accessed data;

wherein the DRAM buffer further comprises;

a first data read cache for storing frequently-accessed, recently-accessed data for reading by the host;

a second data read cache for storing frequently-accessed, non-recently-accessed data for reading by the host;

a third data read cache for storing non-frequently-accessed, recently-accessed data for reading by the host; and

a fourth data read cache for storing non-frequently-accessed, non-recently-accessed data for reading by the host.