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Flash memory controller with calibrated data communication

  • US 9,405,678 B2
  • Filed: 09/21/2015
  • Issued: 08/02/2016
  • Est. Priority Date: 10/19/1999
  • Status: Expired due to Fees
First Claim
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1. A flash memory controller, comprising:

  • a bus interface to couple to a plurality of flash memory devices, the bus interface including a circuit to send at least one signal to individually address a selected flash memory device of the plurality of flash memory devices and store a device-specific value in a reference voltage register of the selected flash memory device; and

    a transmitter to output a data signal to the selected flash memory devicewherein the device-specific value stored in the reference voltage register of the selected flash memory device controls a reference voltage used by a corresponding receiver circuit of the selected flash memory device, the receiver circuit to receive the data signal transmitted by the flash memory controller to the selected flash memory device.

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