Display panel and method of detecting defects thereof

• US 9,406,250 B2
• Filed: 03/14/2013
• Issued: 08/02/2016
• Est. Priority Date: 11/16/2012
• Status: Active Grant

• Current Assignee: AU Optronics Corporation
• Original Assignee: AU Optronics Corporation
• Inventors: Chen, Po-Ya, Tsai, Meng-Che
• Primary Examiner(s): Hollington, Jermele M
• Assistant Examiner(s): Rajaputra, Suresh K
• Application Number:
  US13/831,527
• Publication Number:
  US 20140139255A1
• Time in Patent Office: 1,237 Days
• Field of Search: None
• US Class Current: 1/1
• CPC Class Codes: G09G 3/006 Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309

Abstract

A display panel includes a first substrate, a plurality of pixel units, a plurality of first signal lines, a first testing line and a second testing line. The first signal lines are disposed on a peripheral area and electrically connected to corresponding pixel units. The first signal lines include a plurality of first sets of signal lines and a plurality of second sets of signal lines alternatively arranged. The first and second sets of signal lines are formed on different layers. The first testing line is electrically connected to the first sets of signal lines. The second testing line is electrically connected to the second sets of signal lines.

Claims

1. A display panel, comprising:

a first substrate having a display area and a peripheral area;

a plurality of pixel units, arranged on the display area in an array;

a plurality of first signal lines, disposed on the peripheral area and electrically connected to corresponding pixel units, the plurality of first signal lines comprising a plurality of first sets of sub-signal lines and a plurality of second sets of sub-signal lines alternatively arranged, each first set of sub-signal lines having a first sub-signal line and a second sub-signal line, each second set of sub-signal lines having the first sub-signal line and the second sub-signal line, first sub-signal lines of the first sets of sub-signal lines and of the second sets of sub-signal lines and second sub-signal lines of the first sets of sub-signal lines and of the second sets of sub-signal lines being formed on different layers;

a first testing line, electrically connected to the first and second sub-signal lines of the first sets of sub-signal lines; and

a second testing line, electrically connected to the first and second sub-signal lines of the second sets of sub-signal lines.

2. The display panel of claim 1, wherein the first and second sub-signal lines of the first sets of sub-signal lines and of the second sets of sub-signal lines are alternatively arranged.

3. The display panel of claim 1, wherein the first sub-signal lines of the first sets of sub-signal lines and of the second sets of sub-signal lines are formed by a first conducting layer, and the second sub-signal lines of the first sets of sub-signal lines and of the second sets of sub-signal lines are formed by a second conducting layer.

4. The display panel of claim 3, wherein the first sub-signal lines of the first sets of sub-signal lines and of the second sets of sub-signal lines are electrically connected to respective pixel units through respective contact holes, and the second sub-signal lines of the first sets of sub-signal lines and of the second sets of sub-signal lines are electrically connected to respective pixel units directly.

5. The display panel of claim 1, further comprising a first dielectric layer formed on the first substrate, and formed between the first sub-signal lines of the first sets of sub-signal lines and of the second sets of sub-signal lines and the second sub-signal lines of the first sets of sub-signal lines and of the second sets of sub-signal lines.

6. The display panel of claim 5, further comprising a second dielectric layer formed above the first substrate, overlaying the second sub-signal lines of the first sets of sub-signal lines and of the second sets of sub-signal lines and the first dielectric layer.

7. The display panel of claim 1, further comprising a second substrate and a display medium layer formed between the first and second substrates.

8. The display panel of claim 1, further comprising:

a first testing pad electrically connected to the first testing line; and

a second testing pad electrically connected to the second testing line.

9. The display panel of claim 1, wherein each of the first and second sets of sub-signal lines further comprises a third signal line, and the first, second and third sub-signal lines of the first and second sets of sub-signal lines are formed on different layers.

10. The display panel of claim 9, wherein the third sub-signal lines of the first and second sets of sub-signal lines are formed by a third conducting layer.

11. The display panel of claim 1, further comprising:

a plurality of second signal lines disposed on the peripheral area and electrically connected to corresponding pixel units, the second signal lines comprising a plurality of fourth sets of sub-signal lines and a plurality of fifth sets of sub-signal lines alternatively arranged, each fourth set of sub-signal lines having a fourth sub-signal line and a fifth sub-signal line, each fifth set of sub-signal lines having a fourth sub-signal line and a fifth sub-signal line, fourth sub-signal lines of the fourth sets of sub-signal lines and of the fifth sets of sub-signal lines and the fifth sub-signal lines of the fourth sets of sub-signal lines and of the fifth sets of sub-signal lines being on different layers;

a fourth testing line, electrically connected to the fourth and fifth sub-signal lines of the fourth sets of sub-signal lines; and

a fifth testing line, electrically connected to the fourth and fifth sub-signal lines of the fifth sets of sub-signal lines.

12. The display panel of claim 11, wherein the plurality of first signal lines are a plurality of data lines, and the plurality of second signal lines are a plurality of scan lines.

13. The display panel of claim 11, wherein the fourth and fifth sub-signal lines of the fourth sets of sub-signal lines and of the fifth sets of sub-signal lines are alternatively arranged.

14. The display panel of claim 11, wherein the fourth sub-signal lines of the fourth sets of sub-signal lines and of the fifth sets of sub-signal lines are formed by a first conducting layer, and the fifth sub-signal lines of the fourth sets of sub-signal lines and of the fifth sets of sub-signal lines are formed by a second conducting layer.

15. The display panel of claim 11, wherein each of the fourth and fifth sets of sub-signal lines further comprises a sixth signal line.

16. A method of detecting defects of a display panel, the display panel comprising a first substrate, a plurality of pixel units, a plurality of first signal lines, a first testing line and a second testing line, the first substrate having a display area and a peripheral area, the plurality of pixel units being arranged on the display area in an array, the plurality of first signal lines being disposed on the peripheral area and electrically connected to corresponding pixel units, the plurality of first signal lines comprising a plurality of first sets of sub-signal lines and a plurality of second sets of sub-signal lines alternatively arranged, each first set of sub-signal lines having a first sub-signal line and a second sub-signal line, each second set of sub-signal lines having a first sub-signal line and a second sub-signal line, first sub-signal lines of the first sets of sub-signal lines and of the second sets of sub-signal lines and second sub-signal lines of the first sets of sub-signal lines and of the second sets of sub-signal lines being formed on different layers, the first testing line being electrically connected to the first and second sub-signal lines of the first sets of sub-signal lines, the second testing line being electrically connected to the first and second sub-signal lines of the second sets of sub-signal lines, the method comprising:

lighting up pixel units electrically connected to the first sets of sub-signal lines to detect whether the pixel units electrically connected to the first sets of sub-signal lines have defects; and

lighting up pixel units electrically connected to the second sets of sub-signal lines to detect whether the pixel units electrically connected to the second sets of sub-signal lines have defects.

17. The method of claim 16, wherein lighting up the pixel units electrically connected to the first sets of sub-signal lines comprises inputting a first set of testing signals to the first and second testing lines.

18. The method of claim 16, wherein lighting up the pixel units electrically connected to the second sets of sub-signal lines comprises inputting a second set of testing signals to the first and second testing lines.

19. A display panel, comprising:

a first substrate having a display area and a peripheral area;

a plurality of pixel units, arranged on the display area in an array;

a plurality of first signal lines, disposed on the peripheral area and electrically connected to corresponding pixel units, the plurality of first signal lines comprising a plurality of first sets of sub-signal lines and a plurality of second sets of sub-signal lines alternatively arranged, each first set of sub-signal lines having a first sub-signal line and a second sub-signal line, each second set of sub-signal lines having a first sub-signal line and a second sub-signal line, first sub-signal lines of the first sets of sub-signal lines and of the second sets of sub-signal lines and second sub-signal lines of the first sets of sub-signal lines and of the second sets of sub-signal lines being formed on different layers;

a driving element, disposed on the first signal lines and electrically connected to the first signal lines;

a first testing line, disposed corresponding to the first and second sub-signal lines of the first sets of sub-signal lines;

a second testing line, disposed corresponding to the first and second sub-signal lines of the second sets of sub-signal lines; and

a slit, formed between the first testing line and the first sets of sub-signal lines, and between the second testing line and the second sets of sub-signal lines, for isolating the first testing line from the first sets of sub-signal lines, and isolating the second testing line from the second sets of sub-signal lines.

20. The display panel of claim 19, wherein the driving element comprises an integrated circuit chip.

21. The display panel of claim 19, wherein the first signal lines further comprises a plurality of connecting pads for electrically connecting the driving element.