Semiconductor devices including superlattice depletion layer stack and related methods
First Claim
1. A method for making a semiconductor device comprising:
- forming an alternating stack of a plurality of superlattices and a plurality of bulk semiconductor layers on a substrate, each superlattice including a plurality of stacked group of layers, each group of layers of the superlattice comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions;
doping bulk semiconductor layers between respective superlattices with alternating dopant conductivity types defining a p-n junction;
forming spaced apart source and drain regions in an upper bulk semiconductor layer of the alternating stack of superlattices and bulk semiconductor layers; and
forming a gate on the upper bulk semiconductor layer between the spaced apart source and drain regions and defining a depleted channel between the source and drain regions and above the p-n junction;
wherein the semiconductor device is substantially devoid of an oxide layer between the channel and the substrate.
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Accused Products
Abstract
A semiconductor device may include an alternating stack of superlattice and bulk semiconductor layers on a substrate, with each superlattice layer including a plurality of stacked group of layers, and each group of layers of the superlattice layer including a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The semiconductor device may further include spaced apart source and drain regions in an upper bulk semiconductor layer of the alternating stack of superlattice and bulk semiconductor layers, and a gate on the upper bulk semiconductor layer between the spaced apart source and drain regions.
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Citations
22 Claims
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1. A method for making a semiconductor device comprising:
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forming an alternating stack of a plurality of superlattices and a plurality of bulk semiconductor layers on a substrate, each superlattice including a plurality of stacked group of layers, each group of layers of the superlattice comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions; doping bulk semiconductor layers between respective superlattices with alternating dopant conductivity types defining a p-n junction; forming spaced apart source and drain regions in an upper bulk semiconductor layer of the alternating stack of superlattices and bulk semiconductor layers; and forming a gate on the upper bulk semiconductor layer between the spaced apart source and drain regions and defining a depleted channel between the source and drain regions and above the p-n junction; wherein the semiconductor device is substantially devoid of an oxide layer between the channel and the substrate. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 19, 20)
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9. A semiconductor device comprising:
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an alternating stack of a plurality of superlattices and a plurality of bulk semiconductor layers on a substrate, each superlattice including a plurality of stacked group of layers, each group of layers of the superlattice comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions, the bulk semiconductor layers between respective superlattices being doped with alternating dopant conductivity types defining a p-n junction; spaced apart source and drain regions in an upper bulk semiconductor layer of the alternating stack of superlattices and bulk semiconductor layers; and a gate on the upper bulk semiconductor layer between the spaced apart source and drain regions and defining a depleted channel between the source and drain regions and above the p-n junction; wherein the semiconductor device is substantially devoid of an oxide layer between the channel and the substrate. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 21, 22)
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17. A semiconductor device comprising:
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an alternating stack of a plurality of superlattices and a plurality of bulk silicon layers on a substrate, each superlattice including a plurality of stacked group of layers, each group of layers of the superlattice comprising a plurality of stacked base silicon monolayers defining a base silicon portion and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions, the bulk semiconductor layers between respective superlattices being doped with alternating dopant conductivity types defining a p-n junction; spaced apart source and drain regions in an upper bulk silicon layer of the alternating stack of superlattices and bulk silicon layers; and a gate on the upper bulk silicon layer between the spaced apart source and drain regions and defining a depleted channel between the source and drain regions and above the p-n junction; wherein the semiconductor device is substantially devoid of an oxide layer between the channel and the substrate. - View Dependent Claims (18)
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Specification