Stress-reduced field-effect semiconductor device and method for forming therefor
First Claim
1. A field-effect semiconductor device, comprising a semiconductor body with a first surface defining a vertical direction, the field-effect semiconductor device further comprising in a vertical cross-section:
- a vertical trench extending from the first surface into the semiconductor body and comprising a field electrode, a cavity at least partly surrounded by the field electrode, and an insulation structure substantially surrounding at least the field electrode,wherein an interface between the insulation structure and the surrounding semiconductor body is under tensile stress and the cavity is filled or unfilled so as to counteract the tensile stress.
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Abstract
A field-effect semiconductor device is provided. The field-effect semiconductor device includes a semiconductor body with a first surface defining a vertical direction. In a vertical cross-section the field-effect semiconductor device further includes a vertical trench extending from the first surface into the semiconductor body and comprising a field electrode, a cavity at least partly surrounded by the field electrode, and an insulation structure substantially surrounding at least the field electrode. An interface between the insulation structure and the surrounding semiconductor body is under tensile stress and the cavity is filled or unfilled so as to counteract the tensile stress.
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Citations
18 Claims
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1. A field-effect semiconductor device, comprising a semiconductor body with a first surface defining a vertical direction, the field-effect semiconductor device further comprising in a vertical cross-section:
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a vertical trench extending from the first surface into the semiconductor body and comprising a field electrode, a cavity at least partly surrounded by the field electrode, and an insulation structure substantially surrounding at least the field electrode, wherein an interface between the insulation structure and the surrounding semiconductor body is under tensile stress and the cavity is filled or unfilled so as to counteract the tensile stress. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 17)
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10. A semiconductor device, comprising:
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a semiconductor body comprising a first surface defining a vertical direction, a substantially vertically orientated outer edge, and an active area spaced apart from the outer edge, the active area comprising a plurality of insulated gate electrodes arranged next to the first surface and extending into the semiconductor body, and a plurality of dielectric regions spaced apart from the insulated gate electrodes and extending from the first surface into the semiconductor body and at least partially vertically below the insulated gate electrodes; and at least one of a cavity arranged below the first surface and between the outer edge and the active area, a cavity arranged below the first surface and in a kerf region, a cavity arranged next to a lowermost portion of at least one of the plurality of dielectric regions, and a cavity comprising, in a vertical cross-section, a maximum horizontal extension and a maximum vertical extension larger than the maximum horizontal extension, wherein an interface between the dielectric regions and the surrounding semiconductor body is under tensile stress and the cavity is filled or unfilled so as to counteract the tensile stress. - View Dependent Claims (11, 12, 13, 18)
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14. A field-effect semiconductor device, comprising:
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a semiconductor body comprising a first surface defining a vertical direction; a trench gate electrode extending from the first surface into the semiconductor body and insulated from the semiconductor body by a gate dielectric region; and a cavity arranged, in the vertical direction, at least partially below the trench gate electrode, and configured to reduce mechanical stress in the semiconductor body, wherein the cavity is unfilled. - View Dependent Claims (15, 16)
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Specification