Semiconductor device

• US 9,406,796 B2
• Filed: 12/15/2015
• Issued: 08/02/2016
• Est. Priority Date: 07/11/2013
• Status: Active Grant

• Current Assignee: Panasonic Semiconductor Solutions Co., Ltd. (Winbond Electronics Corporation)
• Original Assignee: Panasonic Intellectual Property Management Co., Ltd. (Panasonic Holdings Corporation)
• Inventors: Aoki, Shigetaka, Yamashita, Katsushige
• Primary Examiner(s): Nguyen, Khiem D
• Application Number:
  US14/970,068
• Publication Number:
  US 20160104795A1
• Time in Patent Office: 231 Days
• US Class Current: 1/1
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/4236 within a trench, e.g. trench gate electrode, groove gate electrode
• CPC Class Codes: H01L 29/4916 the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/7832 the structure comprising a MOS gate and at least one non-MOS gate, e.g. JFET or MESFET gate

Abstract

A semiconductor device includes a second conductivity type back gate electrode formed within a body area, and electrically connected with the body area, and performs bidirectional current control in a direction from a drain area to a source area and in a direction from the source area to the drain area. A sheet resistance of the back gate electrode is lower than a sheet resistance of the body area. The source area and the back gate electrode are disposed apart from each other with a clearance sufficient for preventing a breakdown phenomenon caused between the source area and the back gate electrode when a maximum operation voltage is applied between the source area and the drain area.

Claims

1. A semiconductor device comprising:

a first conductivity type semiconductor substrate to be a drain area;

a drift area formed on the drain area;

a second conductivity type body area formed on an upper portion of the drift area;

a first conductivity type source area formed on an upper portion of the body area;

a trench that penetrates the source area and the body area, and reaches the drift area;

an insulation film formed on an inner wall of the trench;

a gate electrode formed inside the insulation film; and

a second conductivity type back gate electrode formed inside the body area and electrically connected with the body area,

wherein;

a current flows from the drain area to the source area in a state where a first voltage is applied to the drain area, a second voltage lower than the first voltage is applied to the source area and the body area, and a third voltage equal to or higher than a first threshold is applied between the gate electrode and the source area,

a current flows from the source area to the drain area in a state where the first voltage is applied to the source area, the second voltage is applied to the drain area and the body area, and a fourth voltage equal to or higher than a second threshold is applied between the gate electrode and the drain area,

a sheet resistance of the back gate electrode is lower than a sheet resistance of the body area, and

the source area and the back gate electrode are disposed apart from each other with a clearance sufficient for preventing a breakdown phenomenon caused between the source area and the back gate electrode when a maximum operation voltage is applied between the source area and the drain area.

2. The semiconductor device according to claim 1, wherein an insulation film is formed between the back gate electrode and the source area.

3. The semiconductor device according to claim 1, wherein the back gate electrode is formed of polysilicon.

4. The semiconductor device according to claim 1, wherein the back gate electrode includes a diffusion layer.

5. The semiconductor device according to claim 1, wherein

the back gate electrode is connected with a back gate terminal via a first contact,

the gate electrode is connected with a gate terminal via a second contact, and

a voltage driving distance of the back gate electrode driven from the first contact when a voltage is applied to the back gate terminal is shorter than a voltage driving distance of the gate electrode driven from the second contact when a voltage is applied to the gate terminal.

6. The semiconductor device according to claim 1, wherein the gate electrode is surrounded by the back gate electrode in a plan view.

7. The semiconductor device according to claim 1, wherein the back gate electrode extends over the body area and the drift area.

8. The semiconductor device according to claim 2, wherein the back gate electrode is formed of polysilicon.

9. The semiconductor device according to claim 2, wherein the back gate electrode includes a diffusion layer.

10. The semiconductor device according to claim 2, wherein

the back gate electrode is connected with a back gate terminal via a first contact,

the gate electrode is connected with a gate terminal via a second contact, and

a voltage driving distance of the back gate electrode driven from the first contact when a voltage is applied to the back gate terminal is shorter than a voltage driving distance of the gate electrode driven from the second contact when a voltage is applied to the gate terminal.

11. The semiconductor device according to claim 2, wherein the gate electrode is surrounded by the back gate electrode in a plan view.

12. The semiconductor device according to claim 2, wherein the back gate electrode extends over the body area and the drift area.