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System and method using cascaded single partity check coding

  • US 9,407,398 B2
  • Filed: 09/08/2013
  • Issued: 08/02/2016
  • Est. Priority Date: 09/08/2013
  • Status: Active Grant
First Claim
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1. A system comprising:

  • a parity bit encoder configured to encode successive blocks of n−

    3 bits with three parity bits to provide successive blocks of n bits;

    a Gray mapper coupled to said parity bit encoder and configured to map each one of said blocks of n bits to three associated quadrature amplitude modulated (QAM) symbols;

    a modulator coupled to said Gray mapper and configured to modulate an optical signal in response to an output of said Gray mapper to provide a modulated optical signal comprising said three associated QAM symbols;

    a detector for receiving said modulated optical signal and providing an electrical signal representative of said optical signal; and

    a de-mapper configured to provide a de-mapper output representative of said blocks of n−

    3 bits in response to said electrical signal.

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