Method of forming semiconductor device

• US 9,412,612 B2
• Filed: 08/29/2014
• Issued: 08/09/2016
• Est. Priority Date: 08/29/2014
• Status: Active Grant

• Current Assignee: Macronix International Co., Ltd.
• Original Assignee: Macronix International Co., Ltd.
• Inventors: Yang, Chin-Cheng
• Primary Examiner(s): Duda, Kathleen
• Application Number:
  US14/473,220
• Publication Number:
  US 20160064237A1
• Time in Patent Office: 711 Days
• US Class Current: 1/1
• CPC Class Codes: G03F 7/26 Processing photosensitive materials; Apparatus therefor G03F7/12 - G03F7/24 take precedence
• CPC Class Codes: H01L 21/0337 characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
• CPC Class Codes: H01L 21/3086 characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
• CPC Class Codes: H01L 21/3088 Process specially adapted to improve the resolution of the mask
• CPC Class Codes: H01L 21/31144 using masks
• CPC Class Codes: H01L 21/32139 using masks

Abstract

A method of forming a semiconductor device is disclosed. A substrate having a first area and a second area is provided. A target layer and a hard mask layer are sequentially formed on the substrate in the first area and in the second area. Transfer patterns are formed in a spacer form on the hard mask layer in the first area. A photoresist layer is formed directly on the hard mask layer, and covers the transfer patterns and the hard mask layer in the first area and in the second area. The photoresist layer in the first area is removed. The hard mask layer is patterned by using the transfer patterns as a mask.

Claims

1. A method of forming a semiconductor device, comprising:

providing a substrate having a first area and a second area;

sequentially forming a target layer and a hard mask layer on the substrate in the first area and in the second area;

forming a plurality of transfer patterns in a spacer form on the hard mask layer in the first area;

forming a photoresist layer directly on the hard mask layer, wherein the photoresist layer covers the transfer patterns and the hard mask layer in the first area and in the second area;

removing the photoresist layer in the first area; and

patterning the hard mask layer by using the transfer patterns as a mask.

2. The method of claim 1, wherein a bottom anti-reflection coating (BARC) layer is not applied before the step of forming the photoresist layer and after the step of forming the transfer patterns.

3. The method of claim 1, wherein the hard mask layer comprises amorphous silicon, polysilicon, silicon carbonitride, carbon, TiN or a combination thereof.

4. The method of claim 1, wherein the hard mask layer has an absorption value at 193 nm exposure wavelength greater than about 2.

5. The method of claim 1, wherein the hard mask layer has a thickness of equal to about 30 nm.

6. The method of claim 1, wherein the transfer patterns have an aspect ratio of about 5 to 10.

7. The method of claim 1, wherein the step of forming the transfer patterns in the spacer form comprises:

forming a plurality of core patterns on the hard mask layer;

forming a transfer material layer on the hard mask layer covering the core patterns;

removing a portion of the transfer material layer, so as to form two transfer patterns as spacers on sidewalls of each core pattern; and

removing the core patterns.

8. The method of claim 7, wherein an etch selectivity of the transfer patterns to the core patterns ranges from about 1/2 to 1/10.

9. The method of claim 1, wherein an etch selectivity of the transfer patterns to the hard mask layer ranges from about 1/2 to 1/10.

10. The method of claim 1, wherein the step of removing the photoresist layer in the first area comprises performing an exposure step and a development step to the photoresist layer.

11. The method of claim 10, wherein the photoresist layer upon the development step defines at least one photoresist pattern in the second area.

12. The method of claim 1, wherein the first area is an array area and the second area is a periphery area.

13. The method of claim 1, wherein the target layer comprises a conductive layer, a dielectric layer or a combination thereof.

14. A method of forming a semiconductor device, comprising:

forming an opaque hard mask layer on a target layer;

forming a plurality of separate transfer patterns on the hard mask layer, wherein the transfer patterns have slightly tilted sidewalls;

coating a photoresist layer directly on the hard mask layer covering the transfer patterns; and

performing an exposure step and a development step to the photoresist layer, so as to expose the transfer patterns, wherein the transfer patterns upon the development step have the same slightly tilted sidewalls.

15. The method of claim 14, wherein a bottom anti-reflection coating (BARC) layer is not applied before the step of coating the photoresist layer and after the step of forming the transfer patterns.

16. The method of claim 14, wherein the hard mask layer has an absorption value at 193 nm exposure wavelength greater than about 2.

17. The method of claim 14, wherein the hard mask layer has a thickness of equal to about 30 nm.

18. The method of claim 14, wherein the transfer patterns have an aspect ratio of about 5 to 10.

19. The method of claim 14, wherein the step of forming the transfer patterns comprises:

forming a plurality of core patterns on the hard mask layer;

forming a transfer material layer on the hard mask layer covering the core patterns;

removing a portion of the transfer material layer, so as to form two transfer patterns as spacers on sidewalls of each core pattern; and

removing the core patterns.

20. The method of claim 14, wherein the photoresist layer upon the development step defines at least one photoresist pattern in a periphery area.