Self-aligned passivation of active regions
First Claim
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1. A method comprising:
- recessing isolation regions on opposite sides of a semiconductor region, wherein a top portion of the semiconductor region higher than top surfaces of the isolation regions forms a semiconductor fin;
performing a first passivation step on a top surface of the semiconductor fin using a first passivation species;
performing a second passivation step on sidewalls of the semiconductor fin using a second passivation species different from the first passivation species, wherein the first passivation step and the second passivation step are performed after the step of recessing the isolation regions, wherein the first passivation step and the second passivation step are performed simultaneously; and
forming a gate stack on the semiconductor fin.
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Abstract
A method includes forming a semiconductor fin, performing a first passivation step on a top surface of the semiconductor fin using a first passivation species, and performing a second passivation step on sidewalls of the semiconductor fin using a second passivation species different from the first passivation species. A gate stack is formed on a middle portion of the semiconductor fin. A source or a drain region is formed on a side of the gate stack, wherein the source or drain region and the gate stack form a Fin Field-Effect Transistor (FinFET).
12 Citations
20 Claims
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1. A method comprising:
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recessing isolation regions on opposite sides of a semiconductor region, wherein a top portion of the semiconductor region higher than top surfaces of the isolation regions forms a semiconductor fin; performing a first passivation step on a top surface of the semiconductor fin using a first passivation species; performing a second passivation step on sidewalls of the semiconductor fin using a second passivation species different from the first passivation species, wherein the first passivation step and the second passivation step are performed after the step of recessing the isolation regions, wherein the first passivation step and the second passivation step are performed simultaneously; and forming a gate stack on the semiconductor fin. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method comprising:
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performing a first passivation step on a top surface of a semiconductor region using a first passivation species, wherein the semiconductor region is between isolation regions, with the top surface of the semiconductor region being substantially level with top surfaces of the isolation regions; after the first passivation step, recessing the isolation regions, wherein a top portion of the semiconductor region higher than top surfaces of remaining portions of the isolation regions forms a semiconductor fin; after the step of recessing, performing a second passivation step on the semiconductor fin using a second passivation species different from the first passivation species, wherein the first passivation step is performed using the first passivation species selected from the group consisting essentially of sulfur, selenium, and combinations thereof, or the second passivation step is performed using the second passivation species selected from the group consisting essentially of antimony, sulfur, arsenic, and combinations thereof; and forming a gate stack on the semiconductor fin. - View Dependent Claims (8, 9, 10, 11, 12)
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13. A method comprising:
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forming a semiconductor fin; performing a first passivation step on a top surface and sidewalls of the semiconductor fin using a first passivation species, wherein the first passivation species comprises a first element and a second element, wherein the first element is selected from the group consisting essentially of sulfur, selenium, and combinations thereof, and the second element is selected from the group consisting essentially of antimony, sulfur, arsenic, and combinations thereof; and forming a gate stack on the semiconductor fin. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20)
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Specification