Transmission voltage loss compensation circuit, compensation method, controlling chip and switching power supply

• US 9,413,252 B2
• Filed: 04/05/2014
• Issued: 08/09/2016
• Est. Priority Date: 04/15/2013
• Status: Active Grant

• Current Assignee: Silergy Semiconductor Technology (Hangzhou) Ltd. (Silergy Corporation)
• Original Assignee: Silergy Semiconductor Technology (Hangzhou) Ltd. (Silergy Corporation)
• Inventors: Xu, Xiaoru, Han, Yunlong
• Primary Examiner(s): Dole, Timothy J
• Assistant Examiner(s): JAMALI, ISHRAT F
• Application Number:
  US14/246,065
• Publication Number:
  US 20140307485A1
• Time in Patent Office: 857 Days
• US Class Current: 1/1
• CPC Class Codes: H02M 1/0025 Arrangements for modifying reference values, feedback values or error values in the control loop of a converter
• CPC Class Codes: H02M 1/08 Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
• CPC Class Codes: H02M 3/335 using semiconductor devices only
• CPC Class Codes: H02M 3/33507 with automatic control of the output voltage or current, e.g. flyback converters H02M3/33561, H02M3/33569 take precedence
• CPC Class Codes: H02M 3/33515 with digital control
• CPC Class Codes: H02M 3/33523 with galvanic isolation between input and output of both the power stage and the feedback loop

Abstract

In one embodiment, a method of compensating for transmission voltage loss from a switching power supply, can include: (i) receiving a sampling signal that represents an output current of the switching power supply; (ii) delaying the sampling signal to generate a delayed sampling signal; (iii) converting the delayed sampling signal to generate a compensation signal; and (iv) regulating an output voltage of the switching power supply based on the compensation signal to compensate for the transmission voltage loss from the output voltage transmission to a load such that a voltage at the load is maintained as substantially consistent with an expected voltage at the load.

Claims

1. A method of compensating for transmission voltage loss from a switching power supply, the method comprising:

a) receiving, in a current feedback circuit, a feedback signal from a feedback terminal that is coupled to an auxiliary winding of said switching power supply, and a signal from a common node of a sampling resistor and a main switch of said switching power supply;

b) generating, by said current feedback circuit, a sampling signal that represents an output current of said switching power supply, wherein said sampling signal is generated from said feedback signal and said common node signal;

c) delaying, by a delay circuit, said sampling signal to generate a delayed sampling signal;

d) converting said delayed sampling signal to generate a compensation signal; and

e) regulating an output voltage of said switching power supply based on said compensation signal to compensate for said transmission voltage loss from said output voltage transmission to a load such that a voltage at said load is maintained as substantially consistent with an expected voltage at said load;

wherein said delay circuit comprises;

a) first and second switches coupled in series between said sampling signal and said delayed sampling signal, wherein said second switch is controllable by a clock signal, and said first switch is controllable by an inverted version of said clock signal;

b) a first capacitor coupled between a common node of said first and second switches and ground; and

c) a second capacitor a coupled between said delayed sampling signal and ground.

2. The method of claim 1, wherein said compensation signal generation comprises:

a) converting said delay signal to a first current signal by a voltage-current conversion circuit;

b) generating an output voltage feedback signal by a resistor divider and said first current signal; and

c) using a voltage drop generated on said resistor divider as said compensation signal.

3. The method of claim 1, wherein a signal other than said clock signal is connected to a gate of said main switch.

4. The method of claim 1, wherein a capacitance of said second capacitor is far greater than a capacitance of said first capacitor.

5. The method of claim 4, wherein said capacitance of said second capacitor is about 20 times greater than said capacitance of said first capacitor.

6. A transmission voltage loss compensation circuit configured for a switching power supply, the transmission voltage loss compensation circuit comprising:

a) a current feedback circuit configured to receive a feedback signal from a feedback terminal coupled to an auxiliary winding of said switching power supply, and a signal from a common node of a sampling resistor and a main switch of said switching power supply, and to generate a sampling signal that represents an output current of said switching power supply therefrom;

b) a delay circuit configured to delay said sampling signal to generate a delayed sampling signal;

c) a voltage-current conversion circuit configured to convert said delayed sampling signal to a first current signal, wherein said first current signal is coupled to said feedback terminal to generate a compensation signal; and

d) a controlling circuit having said current feedback circuit and said feedback terminal; and

being configured to regulate an output voltage of said switching power supply based on said compensation signal to compensate for transmission voltage loss from said output voltage transmission to a load such that a voltage at said load is maintained as substantially consistent with an expected voltage at said load;

wherein said delay circuit comprises;

a) first and second switches coupled in series between said sampling signal and said delayed sampling signal, wherein said second switch is controllable by a clock signal, and said first switch is controllable by an inverted version of said clock signal;

b) a first capacitor coupled between a common node of said first and second switches and ground; and

c) a second capacitor a coupled between said delayed sampling signal and ground.

7. The transmission voltage loss compensation circuit of claim 6, wherein said voltage-current conversion circuit comprises:

a) a first comparator configured to compare said delay signal against a first voltage signal, and to generate a first comparison signal; and

b) a third switch being controllable by said first comparison signal, and having a first power terminal coupled to said feedback terminal, and a second power terminal coupled to ground through a resistor, wherein a voltage at a common node of said third switch and said resistor is configured as said first voltage signal.

8. A switching power supply, comprising:

a) a power stage configured as a flyback converter; and

b) the transmission voltage loss compensation circuit of claim 6.

9. The switching power supply of claim 8, wherein said power stage comprises said auxiliary winding and a resistor divider coupled in parallel, and wherein an output terminal of said resistor divider is configured as said feedback terminal.

10. The transmission voltage loss compensation circuit of claim 6, wherein said controlling circuit further comprises a voltage feedback circuit coupled to said feedback terminal.

11. The transmission voltage loss compensation circuit of claim 6, wherein a signal other than said clock signal is connected to a gate of said main switch.

12. The transmission voltage loss compensation circuit of claim 6, wherein an equivalent time constant of said delay circuit is related to a period of said clock signal.

13. The transmission voltage loss compensation circuit of claim 6, wherein a capacitance of said second capacitor is far greater than a capacitance of said first capacitor.

14. The transmission voltage loss compensation circuit of claim 13, wherein said capacitance of said second capacitor is about 20 times greater than said capacitance of said first capacitor.

15. The transmission voltage loss compensation circuit of claim 6, further comprising a resistor divider coupled in parallel with said auxiliary winding, wherein said resistor divider comprises first and second resistors coupled in series between a first terminal of said auxiliary winding and ground, wherein a common node between said first and second resistors is configured as said feedback terminal, and wherein a resistance of said first resistor is predetermined in accordance with said transmission voltage loss.

16. The transmission voltage loss compensation circuit of claim 6, wherein a time constant of said delay circuit is determined to decrease a bandwidth of said transmission voltage loss compensation circuit.