Optoelectronic switch

• US 9,417,396 B2
• Filed: 03/04/2015
• Issued: 08/16/2016
• Est. Priority Date: 09/30/2014
• Status: Active Grant

• Current Assignee: Rockley Photonics Limited
• Original Assignee: Rockley Photonics Limited
• Inventors: Farrington, Nathan, Rickman, Andrew
• Primary Examiner(s): RAHLL, JERRY T
• Application Number:
  US14/639,041
• Publication Number:
  US 20160091666A1
• Time in Patent Office: 531 Days
• Field of Search: None
• US Class Current: 1/1
• CPC Class Codes: G02B 6/12021 Comprising cascaded AWG devices; AWG multipass configuration; Plural AWG devices integrated on a single chip
• CPC Class Codes: G02B 6/3546 NxM switch, i.e. a regular array of switches elements of matrix type constellation
• CPC Class Codes: G02B 6/356 in an optical cross-connect device, e.g. routing and switching aspects of interconnecting different paths propagating different wavelengths to (re)configure the various input and output links switching polarized beams G02B6/3594; power equalizers G02B6/356 and G02B6/3594; path selecting means H04Q11/0001
• CPC Class Codes: G02B 6/3596 With planar waveguide arrangement, i.e. in a substrate, regardless if actuating mechanism is outside the substrate
• CPC Class Codes: G02B 6/4246 Bidirectionally operating package structures
• CPC Class Codes: H04B 10/801 using optical interconnects, e.g. light coupled isolators, circuit board interconnections
• CPC Class Codes: H04J 14/0212 using optical switches or wavelength selective switches [WSS]
• CPC Class Codes: H04J 14/0256 at the optical channel layer
• CPC Class Codes: H04J 14/0284 WDM mesh architectures
• CPC Class Codes: H04Q 11/0005 Switch and router aspects
• CPC Class Codes: H04Q 2011/0032 using static wavelength routers (e.g. arrayed waveguide grating router [AWGR] )
• CPC Class Codes: H04Q 2011/006 Full mesh

Abstract

An optoelectronic switch comprising: N switch modules, where N is an integer; and an optical full-mesh interconnect; each switch module comprising: M client facing input ports, and M output facing ports, M being an integer which is either equal to or not equal to N; a pre-mesh AWG, the pre-mesh AWG having M inputs and N outputs, each of the N outputs connected to a respective input on the optical full-mesh interconnect; a post-mesh AWG, the post-mesh AWG having N inputs and M outputs, each of the N inputs connected to a respective output of the optical full-mesh interconnect and each of the M outputs for communicating a signal to one or more of the M outputs of the switch module; and a first array of Detector Remodulators (DRMs) located before the pre-mesh AWG, each DRM of the first array configured to receive a signal from an input of the switch module and to regenerate and/or change the wavelength of the received signal to produce a DRM output, the DRM output forming an input at a respective port of the pre-mesh AWG.

Claims

1. An optoelectronic switch comprising:

N switch modules, where N is an integer; and

an optical full-mesh interconnect;

each switch module comprising;

M client facing input ports, and M output facing ports, M being an integer which is either equal to or not equal to N;

a pre-mesh AWG, the pre-mesh AWG having M inputs and N outputs, each of the N outputs connected to a respective input on the optical full-mesh interconnect;

a post-mesh AWG, the post-mesh AWG having N inputs and M outputs, each of the N inputs connected to a respective output of the optical full-mesh interconnect and each of the M outputs for communicating a signal to one or more of the M outputs of the switch module; and

a first array of Detector Remodulators (DRMs) located before the pre-mesh AWG, each DRM of the first array configured to receive a signal from an input of the switch module and to regenerate and/or change the wavelength of the received signal to produce a DRM output, the DRM output forming an input at a respective port of the pre-mesh AWG.

2. The optoelectronic switch of claim 1, further comprising a second array of Detector Remodulators (DRMs) located after the post-mesh AWG, each DRM of the second array configured to regenerate and/or convert the wavelength of a signal from a respective output port of the post-mesh AWG for communication to an output port of the switch module.

3. The optoelectronic switch of claim 2, further comprising a rearrangement AWG located after the second array of DRMs, the rearrangement AWG having M input ports and M output ports, each of the M input ports connected to an output of a respective DRM of the second array of DRMs;

and each output port of the rearrangement AWG connected to an output of the switch module.

4. The optoelectronic switch of claim 3, further comprising a final array of DRMs after the rearrangement AWG such that the connection between each of the output ports of the rearrangement AWG and an output port of the switch module is via one of the DRMs of the final array.

5. The optoelectronic switch of claim 1, further comprising a rearrangement AWG located before the first array of DRMs, the rearrangement AWG having M input ports and M output ports, each of the M output ports connected to an input of a respective DRM of the first array of DRMs;

and each input port of the rearrangement AWG connected to an input of the switch module.

6. The optoelectronic switch of claim 5, further comprising an array of rearrangement DRMs located before the rearrangement AWG, each DRM of the array of rearrangement DRMs configured to receive a signal from an input of the switch module and to regenerate and/or change the wavelength of the received signal to produce a DRM output, the DRM output forming an input at a respective port of the rearrangement AWG.

7. The optoelectronic switch of claim 1, wherein N>

M.

8. The optoelectronic switch of claim 1, wherein N<

M.

9. The optoelectronic switch of claim 1, wherein N=M.

10. The optoelectronic switch of claim 1, wherein the optical full-mesh interconnect is an optical backplane.

11. The optoelectronic switch of claim 1 configured to act as a circuit switch.

12. The optoelectronic switch of claim 1 configured to act as a burst switch.

13. The optoelectronic switch of claim 1 configured to act as a packet switch.

14. The optoelectronic switch of claim 1 configured to act as a cell switch.

15. The optoelectronic switch of claim 1, wherein the optical full-mesh interconnect has a folded configuration and each of the switch modules has a folded configuration, and wherein for each switch module:

the pre-mesh AWG is located before the fold; and

the post-mesh AWG located after the fold.

16. The optoelectronic switch of claim 15, wherein the input and output ports of each switch module are all arranged on a single external panel.

17. The optoelectronic switch of claim 1;

wherein the optoelectronic switch is constructed from silicon photonics.

18. An optoelectronic switch module for use with an optical full-mesh interconnect, the optoelectronic switch module comprising:

M client facing input ports, and M output facing ports, where M is an integer;

a pre-mesh AWG, the pre-mesh AWG having M inputs and N outputs where N is an integer which is either equal to or not equal to M, each of the N outputs connected to a respective input on the optical full-mesh interconnect;

a post-mesh AWG, the post-mesh AWG having N inputs and M outputs, each of the N inputs connected to a respective output of the optical full-mesh interconnect and each of the M outputs for communicating a signal to one or more of the M outputs of the switch module; and

a first array of Detector Remodulators (DRMs) located before the pre-mesh AWG, each DRM of the first array configured to receive a signal from an input of the switch module and to regenerate and/or change the wavelength of the received signal to produce a DRM output, the DRM output forming an input at a respective port of the pre-mesh AWG.

19. An optoelectronic switch comprising:

N switch modules, where N is an integer; and

an optical full-mesh interconnect;

each switch module comprising;

M client facing input ports, and M output facing ports, M being an integer which is either equal to or not equal to N;

a pre-mesh AWG, the pre-mesh AWG having M inputs and N outputs, each of the N outputs connected to a respective input on the optical full-mesh interconnect;

a post-mesh AWG, the post-mesh AWG having N inputs and M outputs, each of the N inputs connected to a respective output of the optical full-mesh interconnect and each of the M outputs for communicating a signal to one or more of the M outputs of the switch module; and

a first array of Detector Remodulators (DRMs) located before the pre-mesh AWG, each DRM of the first array configured to receive a signal from an input of the switch module and to regenerate and/or change the wavelength of the received signal to produce a DRM output, the DRM output forming an input at a respective port of the pre-mesh AWG;

a second array of Detector Remodulators (DRMs) located after the post-mesh AWG, each DRM of the second array configured to regenerate and/or convert the wavelength of a signal from a respective output port of the post-mesh AWG for communication to an output port of the switch module;

a first rearrangement AWG located before the first array of DRMs, the first rearrangement AWG having M input ports and M output ports, each of the M output ports connected to an input of a respective DRM of the first array of DRMs; and

each input port of the first rearrangement AWG connected to an input of the switch module; and

a second rearrangement AWG located after the second array of DRMs, the second rearrangement AWG having M input ports and M output ports, each of the M input ports connected to an output of a respective DRM of the second array of DRMs; and

each output port of the second rearrangement AWG connected to an output of the switch module.

20. An optoelectronic switch comprising:

N switch modules, where N is an integer; and

an optical full-mesh interconnect;

each switch module comprising;

M client facing input ports, and M output facing ports, M being an integer which is either equal to or not equal to N;

a pre-mesh AWG, the pre-mesh AWG having M inputs and N outputs, each of the N outputs connected to a respective input on the optical full-mesh interconnect;

a post-mesh AWG, the post-mesh AWG having N inputs and M outputs, each of the N inputs connected to a respective output of the optical full-mesh interconnect and each of the M outputs for communicating a signal to one or more of the M outputs of the switch module; and

a first array of Detector Remodulators (DRMs) located before the pre-mesh AWG, each DRM of the first array configured to receive a signal from an input of the switch module and to regenerate and/or change the wavelength of the received signal to produce a DRM output, the DRM output forming an input at a respective port of the pre-mesh AWG;

a second array of Detector Remodulators (DRMs) located after the post-mesh AWG, each DRM of the second array configured to regenerate and/or convert the wavelength of a signal from a respective output port of the post-mesh AWG for communication to an output port of the switch module;

a first rearrangement AWG located before the first array of DRMs, the first rearrangement AWG having M input ports and M output ports, each of the M output ports connected to an input of a respective DRM of the first array of DRMs; and

each input port of the first rearrangement AWG connected to an input of the switch module;

a second rearrangement AWG located after the second array of DRMs, the second rearrangement AWG having M input ports and M output ports, each of the M input ports connected to an output of a respective DRM of the second array of DRMs; and

each output port of the second rearrangement AWG connected to an output of the switch module;

an additional array of DRMs located before the first rearrangement AWG, each DRM of the additional array configured to receive a signal from an input of the switch module and to regenerate and/or change the wavelength of the received signal to produce a DRM output, the DRM output forming an input at a respective port of the first rearrangement AWG; and

a final array of DRMs located after the second rearrangement AWG such that the connection between each of the output ports of the second rearrangement AWG and an output port of the switch module is via one of the DRMs of the final array.