Over-current detection for bus line drivers

• US 9,417,983 B2
• Filed: 06/03/2013
• Issued: 08/16/2016
• Est. Priority Date: 06/03/2013
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Metzner, Dieter, Widerin, Peter, Wallner, Paul, Rickes, Thomas
• Primary Examiner(s): Zaman, Faisal M
• Application Number:
  US13/908,702
• Publication Number:
  US 20140359190A1
• Time in Patent Office: 1,170 Days
• Field of Search: 710/306, 318/400.22, 361/87, 361/93.9, 363/132
• US Class Current: 1/1
• CPC Class Codes: G06F 11/3027 where the computing system component is a bus
• CPC Class Codes: G06F 11/3062 where the monitored property is the power consumption power management in a computing system G06F1/3203
• CPC Class Codes: G06F 13/4027 using bus bridges G06F13/4022 takes precedence
• CPC Class Codes: G06F 13/4072 Drivers or receivers G06F13/4086 takes precedence; for multistate logic circuits H03K19/0002

Abstract

An electrical circuit for driving a bus is described that includes at least one branch coupled to at least one signal line at a termination of the bus and a transmit data input configured to receive data that the electrical circuit drives across the bus. The electrical circuit also includes a current detection unit coupled to the at least one branch, which is configured to detect a current through the at least one branch. The electrical circuit also includes an over-current determination unit coupled to both the current detection unit and the transmit data input. The over-current determination unit is configured to determine an over-current condition at the at least one branch based on the current at the at least one branch and the data at the transmit data input.

Claims

1. An electrical circuit for driving a bus, comprising:

at least one branch coupled to at least one signal line at a termination of the bus;

a transmit data input configured to receive data, from a processor, that the electrical circuit drives across the bus;

a current detection unit coupled to the at least one branch, wherein the current detection unit is configured to detect a current through the at least one branch; and

an over-current determination unit coupled to both the current detection unit and the transmit data input, wherein the over-current determination unit is configured to;

detect a change of the data at the transmit data input; and

after delaying for at a predetermined amount of time subsequent to the change of the data at the transmit data input, determine an over-current condition at the at least one branch based on the current through the at least one branch and a value of the data at the transmit data input, wherein the predetermined amount of time is greater than or equal to a time duration of a single bit associated with the data at the transmit data input.

2. The electrical circuit of claim 1, further comprising:

an H-bridge circuit comprising a plurality of branches coupled to at the at least one signal line of the bus at the termination of the bus, wherein the at least one branch is one of the plurality of branches.

3. The electrical circuit of claim 1,

wherein the change of the data at the transmit data input is a first change, and

wherein the over-current determination unit is further configured to determine the over-current condition prior to a second change of the data at the transmit data input.

4. The electrical circuit of claim 1,

wherein the at least one branch comprises a resistor and a switch, and

wherein the current detection unit is configured to detect the current through the resistor based on a voltage across the resistor.

5. The electrical circuit of claim 1, further comprising:

a shutdown unit coupled to the over-current determination unit, the transmit data input, and the at least one branch, wherein the shutdown unit is configured to validate the over-current condition determined by the over-current determination unit based at least in part on the value of the data at the transmit data input.

6. The electrical circuit of claim 5,

wherein the shutdown unit is further configured to control the at least one branch in response to validating the over-current condition based at least in part on the value of the data at the transmit data input.

15. The electrical circuit of claim 1, further comprising a transceiver unit configured to generate, based on the data at the transmit data input, a differential voltage signal at the termination of the bus.

16. The electrical circuit of claim 15, wherein the data comprises a binary data stream.

7. A method comprising:

detecting a current through at least one branch of a driver unit coupled to a bus for driving at least one signal line of the bus;

detecting a change in data at a transmit data input of the driver unit, wherein the transmit data input is configured to receive the data from a processor;

after delaying for a predetermined amount of time subsequent to the change of the data at the transmit data input, determining a value of the data at the transmit data input, wherein the predetermined amount of time is greater than or equal to a time duration of a single bit associated with the data at the transmit data input; and

determining an over-current condition at the at least one branch based at least in part on the current through the at least one branch and the value of the data.

8. The method of claim 7,

wherein the change is a first change,

and

wherein the over-current condition is determined after the predetermined amount of time and prior to detecting a second change in the data.

9. The method of claim 7, wherein the at least one branch is one of a plurality of branches of an H-bridge circuit, the method further comprising:

determining a voltage across a resistor of the at least one branch; and

detecting the current through the at least one branch based at least in part on the voltage.

10. The method of claim 7, wherein the over-current condition is a first over-current condition, the method further comprising:

detecting a second over-current condition at a branch of the driver unit other than the at least one branch; and

validating the first over-current condition based at least in part on the value of the data and the second over-current condition.

11. The method of claim 10, further comprising:

controlling a switch of the at least one branch in response to validating the overcurrent condition.

12. A device comprising:

means for detecting a current through at least one branch of a driver unit coupled to a bus for driving at least one signal line of the bus;

means for detecting a change in data at a transmit data input of the driver unit, wherein the transmit data input is configured to receive the data from a processor;

means for determining a value of the data at the transmit data input after delaying for at least a predetermined amount of time subsequent to the change of the data at the transmit data input, wherein the predetermined amount of time is greater than or equal to a time duration of a single bit associated with the data at the transmit data input; and

means for determining an over-current condition at the at least one branch based at least in part on the current through the at least one branch and the value of the data.

13. The device of claim 12, wherein the at least one branch is one of a plurality of branches of an H-bridge circuit, the device further comprising:

means for determining a voltage across a resistor of the at least one branch; and

means for detecting the current through the at least one branch based at least in part on the voltage.

14. The device of claim 12, further comprising:

means for validating the over-current condition based at least in part on the value of the data; and

means for controlling a switch of the at least one branch in response to validating the over-current condition.