Silicon germanium and silicon fins on oxide from bulk wafer
First Claim
1. A method for forming fins for complementary metal oxide semiconductor (CMOS) devices, comprising:
- growing a SiGe layer followed by a silicon layer over a surface of a bulk Si substrate;
patterning fin structures from the silicon layer and the SiGe layer;
filling between the fin structures with a dielectric fill;
forming trenches through the dielectric fill, the fin structures and into the substrate, the trenches including a cut perpendicular to the fin structures to expose end portions of the fin structures;
blocking off a first region of the fin structures with a dielectric layer;
removing the SiGe layer of the fin structures of a second region by selectively etching the fin structures from the end portions of the fin structures to form voids;
filling the voids with dielectric material;
exposing the silicon layer of the fin structures in the first and second regions; and
thermally oxidizing the SiGe layer in the first region to drive Ge into the silicon layer to form SiGe fins on an oxide layer in the first region and silicon fins on the dielectric material in the second region.
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Abstract
A method for forming fins includes growing a SiGe layer and a silicon layer over a surface of a bulk Si substrate, patterning fin structures from the silicon layer and the SiGe layer and filling between the fin structures with a dielectric fill. Trenches are formed to expose end portions of the fin structures. A first region of the fin structures is blocked off. The SiGe layer of the fin structures of a second region is removed by selectively etching the fin structures from the end portions to form voids, which are filled with dielectric material. The silicon layer of the fin structures is exposed. The SiGe layer in the first region is thermally oxidized to drive Ge into the silicon layer to form SiGe fins on an oxide layer in the first region and silicon fins on the dielectric material in the second region.
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Citations
20 Claims
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1. A method for forming fins for complementary metal oxide semiconductor (CMOS) devices, comprising:
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growing a SiGe layer followed by a silicon layer over a surface of a bulk Si substrate; patterning fin structures from the silicon layer and the SiGe layer; filling between the fin structures with a dielectric fill; forming trenches through the dielectric fill, the fin structures and into the substrate, the trenches including a cut perpendicular to the fin structures to expose end portions of the fin structures; blocking off a first region of the fin structures with a dielectric layer; removing the SiGe layer of the fin structures of a second region by selectively etching the fin structures from the end portions of the fin structures to form voids; filling the voids with dielectric material; exposing the silicon layer of the fin structures in the first and second regions; and thermally oxidizing the SiGe layer in the first region to drive Ge into the silicon layer to form SiGe fins on an oxide layer in the first region and silicon fins on the dielectric material in the second region. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method for forming fin field effect transistors for complementary metal oxide semiconductor (CMOS) devices, comprising:
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growing a SiGe layer over a surface of a bulk Si substrate; growing a silicon layer on the SiGe layer; forming a first dielectric layer on the silicon layer; patterning fin structures from the silicon layer and the SiGe layer; filling between the fin structures with a dielectric fill; forming trenches through the dielectric fill, the fin structures and into the substrate, the trenches including a cut perpendicular to the fin structures to expose end portions of the fin structures; blocking off a first region of the fin structures with a second dielectric layer; removing the SiGe layer of the fin structures of a second region by selectively etching the fin structures from the end portions of the fin structures to form voids; filling the voids with dielectric material; exposing the fin structures in the first and second regions; forming spacers on the fin structures; thermally oxidizing the SiGe layer in the first region to drive Ge into the silicon layer in the first region to form SiGe fins on an oxide layer in the first region and silicon fins on the dielectric material in the second region; and removing the spacers. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification