Low defect relaxed SiGe/strained Si structures on implant anneal buffer/strain relaxed buffer layers with epitaxial rare earth oxide interlayers and methods to fabricate same
First Claim
1. A structure, comprising:
- a substrate having a top surface;
a first semiconductor layer disposed on the top surface of the substrate, the first semiconductor layer having a first unit cell geometry;
a second semiconductor layer, the second semiconductor layer having the first unit cell geometry; and
a layer comprised of a metal-containing oxide disposed on the first semiconductor layer between the first semiconductor layer and the second semiconductor layer, the second semiconductor layer being disposed on the layer comprised of the metal-containing oxide, the layer of metal-containing oxide having a second unit cell geometry that differs from the first unit cell geometry to inhibit propagation of misfit dislocations from the first semiconductor layer into the second semiconductor layer;
where the second semiconductor layer is Si1-xGex, and further comprising a layer of strained silicon on a top surface of the second semiconductor layer.
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Accused Products
Abstract
A method provides a substrate having a top surface; forming a first semiconductor layer on the top surface, the first semiconductor layer having a first unit cell geometry; epitaxially depositing a layer of a metal-containing oxide on the first semiconductor layer, the layer of metal-containing oxide having a second unit cell geometry that differs from the first unit cell geometry; ion implanting the first semiconductor layer through the layer of metal-containing oxide; annealing the ion implanted first semiconductor layer; and forming a second semiconductor layer on the layer of metal-containing oxide, the second semiconductor layer having the first unit cell geometry. The layer of metal-containing oxide functions to inhibit propagation of misfit dislocations from the first semiconductor layer into the second semiconductor layer. A structure formed by the method is also disclosed.
28 Citations
16 Claims
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1. A structure, comprising:
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a substrate having a top surface; a first semiconductor layer disposed on the top surface of the substrate, the first semiconductor layer having a first unit cell geometry; a second semiconductor layer, the second semiconductor layer having the first unit cell geometry; and a layer comprised of a metal-containing oxide disposed on the first semiconductor layer between the first semiconductor layer and the second semiconductor layer, the second semiconductor layer being disposed on the layer comprised of the metal-containing oxide, the layer of metal-containing oxide having a second unit cell geometry that differs from the first unit cell geometry to inhibit propagation of misfit dislocations from the first semiconductor layer into the second semiconductor layer; where the second semiconductor layer is Si1-xGex, and further comprising a layer of strained silicon on a top surface of the second semiconductor layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A structure, comprising:
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a substrate having a top surface; a first semiconductor layer disposed on the top surface of the substrate, the first semiconductor layer having a first unit cell geometry; a second semiconductor layer, the second semiconductor layer having the first unit cell geometry; and a layer comprised of a metal-containing oxide disposed on the first semiconductor layer between the first semiconductor layer and the second semiconductor layer, the second semiconductor layer being disposed on the layer comprised of the metal-containing oxide, the layer of metal-containing oxide having a second unit cell geometry that differs from the first unit cell geometry to inhibit propagation of misfit dislocations from the first semiconductor layer into the second semiconductor layer; where the first semiconductor layer is Si1-xGex, and further comprising a further layer of Si1-xGex disposed on a top surface of the second semiconductor layer, where the value of x in the further layer of Si1-xGex is greater than the value of x in the first semiconductor layer. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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Specification