Termination for SiC trench devices

• US 9,419,092 B2
• Filed: 03/01/2006
• Issued: 08/16/2016
• Est. Priority Date: 03/04/2005
• Status: Active Grant

• Current Assignee: Siliconix Technology CV (Vishay Intertechnology Incorporated)
• Original Assignee: Vishay Siliconix
• Inventors: Carta, Rossano, Bellemo, Laura
• Primary Examiner(s): Tsai, H
• Application Number:
  US11/365,291
• Publication Number:
  US 20060214242A1
• Time in Patent Office: 3,821 Days
• Field of Search: 257/409, 257/77, 257/496, 257/510, 257/626, 257/630
• US Class Current: 1/1
• CPC Class Codes: H01L 29/0619 with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
• CPC Class Codes: H01L 29/0661 specially adapted for altering the breakdown voltage by removing semiconductor material at, or in the neighbourhood of, a reverse biased junction, e.g. by bevelling, moat etching, depletion etching
• CPC Class Codes: H01L 29/1608 Silicon carbide
• CPC Class Codes: H01L 29/402 Field plates
• CPC Class Codes: H01L 29/42312 Gate electrodes for field effect devices
• CPC Class Codes: H01L 29/66068 the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
• CPC Class Codes: H01L 29/8083 Vertical transistors SIT H01L29/7722

Abstract

A silicon carbide device has a termination region that includes a mesa region that links the termination region to an active area of the device and that includes one or more trenches.

Claims

1. A semiconductor device comprising:

a silicon carbide body having first and second opposing major surfaces;

an active area formed along said first major surface of said silicon carbide body;

a termination region formed along said first major surface of said silicon carbide body and defining said active area, said termination region including a termination trench formed within said silicon carbide body and having sidewalls and a bottom surface;

a guard ring formed within said silicon carbide body along said sidewalls and said bottom surface of said termination trench; and

a field insulation body covering said sidewalls and said bottom surface of said termination trench, wherein a portion of said field insulation body is in contact with said bottom of said termination trench.

2. The semiconductor device of claim 1, further comprising a field plate disposed over said field insulation body, wherein said field plate is separate from said field insulation body.

3. The semiconductor device of claim 2, wherein said field plate extends beyond an outer sidewall of said termination trench.

4. The semiconductor device of claim 2, wherein said field plate is floating.

5. The semiconductor device of claim 4, wherein said field insulation body has an opening formed therein and wherein said field plate extends through said opening and contacts said guard ring.

6. The semiconductor device of claim 2, wherein said field plate is shorted to an electrode of said device.

7. The semiconductor device of claim 1, wherein said termination region further includes a mesa region disposed between said termination trench and said active area, said mesa region linking said termination region to said active area.

8. The semiconductor device of claim 7, wherein said field insulation body extends over a top surface of said mesa region.

9. The semiconductor device of claim 1, wherein said termination region further includes an EQR ring formed along an outer peripheral edge of said device.

10. The semiconductor device of claim 1, wherein said active area includes at least one trench formed within said silicon carbide body.

11. The semiconductor device of claim 10, wherein said termination trench and said at least one trench of said active area extend to about a same depth within said silicon carbide body.

12. The semiconductor device of claim 1, further comprising a conductive body disposed within said termination trench under said field insulation body.

13. The semiconductor device of claim 12, wherein said conductive body is doped polysilicon.

14. The semiconductor device of claim 1, wherein said semiconductor device is a transistor JFET.

15. The semiconductor device of claim 14, further comprising a gate runner disposed between said termination trench and said active area.

16. The semiconductor device of claim 1, wherein said termination region includes a plurality of termination trenches formed within said silicon carbide body, each termination trench having sidewalls and a bottom surface and being spaced from an adjacent termination trench by a mesa region.

17. The semiconductor device of claim 16, wherein each of said plurality of termination trenches includes a guard ring formed within said silicon carbide body along said sidewalls and said bottom surface of said termination trench.

18. The semiconductor device of claim 17, wherein said field insulation body covers each of said plurality of termination trenches.

19. The semiconductor device of claim 18, further comprising a field plate disposed over said field insulation body.

20. The semiconductor device of claim 18, further comprising a conductive body disposed within each of said termination trenches and under said field insulation body.

21. The semiconductor device of claim 20, wherein said conductive bodies are doped polysilicon.

22. The semiconductor device of claim 18, wherein said termination region further includes a linking mesa region that links said termination region to said active area.

23. The semiconductor device of claim 18, wherein said termination region further includes an EQR ring formed along an outer peripheral edge of said device.

24. The semiconductor device of claim 16, wherein said active area includes at least one trench formed within said silicon carbide body.

25. The semiconductor device of claim 24, wherein each of said termination trenches and said at least one trench of said active area extend to about a same depth within said silicon carbide body.

26. The semiconductor device of claim 16, wherein said semiconductor device is a transistor JFET.