Differential power analysis—resistant cryptographic processing

• US 9,419,790 B2
• Filed: 11/03/2014
• Issued: 08/16/2016
• Est. Priority Date: 01/02/1998
• Status: Expired due to Fees

• Current Assignee: Cryptography Research, Inc. (Rambus Inc.)
• Original Assignee: Cryptography Research, Inc. (Rambus Inc.)
• Inventors: Jun, Benjamin C., Kocher, Paul C., Jaffe, Joshua M.
• Primary Examiner(s): Nalven, Andrew
• Assistant Examiner(s): Nobahar, Abdulhakim
• Application Number:
  US14/530,905
• Publication Number:
  US 20150052368A1
• Time in Patent Office: 652 Days
• Field of Search: None
• US Class Current: 1/1
• CPC Class Codes: G06F 1/06 Clock generators producing several clock signals G06F1/08 - G06F1/14 take precedence
• CPC Class Codes: G06F 1/266 Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips
• CPC Class Codes: G06F 1/3225 of memory devices
• CPC Class Codes: G06F 21/755 with measures against power attack
• CPC Class Codes: G06F 21/77 in smart cards
• CPC Class Codes: G06F 2207/7223 Randomisation as countermeasure against side channel attacks
• CPC Class Codes: G06F 2207/7266 Hardware adaptation, e.g. dual rail logic; calculate add and double simultaneously
• CPC Class Codes: G06F 7/00 Methods or arrangements for processing data by operating upon the order or content of the data handled logic circuits H03K19/00
• CPC Class Codes: G06K 19/073 Special arrangements for circuits, e.g. for protecting identification code in memory protection against unauthorised use of computer memory G06F12/14
• CPC Class Codes: G06K 19/07363 by preventing analysis of the circuit, e.g. dynamic or static power analysis or current analysis
• CPC Class Codes: G06Q 20/341 Active cards, i.e. cards including their own processing means, e.g. including an IC or chip
• CPC Class Codes: G06Q 20/382 insuring higher security of transaction
• CPC Class Codes: G06Q 20/409 Device specific authentication in transaction processing
• CPC Class Codes: G07F 7/08 by coded identity card or credit card or other personal identification means without personal verification means G07F7/02
• CPC Class Codes: G07F 7/082 Features insuring the integrity of the data on or in the card
• CPC Class Codes: G07F 7/1008 Active credit-cards provided with means to personalise their use, e.g. with PIN-introduction/comparison system
• CPC Class Codes: G09C 1/00 Apparatus or methods whereby a given sequence of signs, e.g. an intelligible text, is transformed into an unintelligible sequence of signs by transposing the signs or groups of signs or by replacing them by others according to a predetermined system cryptographic typewriters G09C3/00
• CPC Class Codes: H04L 2209/04 Masking or blinding
• CPC Class Codes: H04L 2209/08 Randomization, e.g. dummy operations or using noise
• CPC Class Codes: H04L 2209/56 Financial cryptography, e.g. electronic payment or e-cash
• CPC Class Codes: H04L 2209/805 : Lightweight hardware, e.g. radio-frequency identification [RFID] or sensor
• CPC Class Codes: H04L 9/003 : for power analysis, e.g. differential power analysis [DPA] or simple power analysis [SPA]
• CPC Class Codes: H04L 9/0618 : Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation

Abstract

Information leaked from smart cards and other tamper resistant cryptographic devices can be statistically analyzed to determine keys or other secret data. A data collection and analysis system is configured with an analog-to-digital converter connected to measure the device'"'"'s consumption of electrical power, or some other property of the target device, that varies during the device'"'"'s processing. As the target device performs cryptographic operations, data from the A/D converter are recorded for each cryptographic operation. The stored data are then processed using statistical analysis, yielding the entire key, or partial information about the key that can be used to accelerate a brute force search or other attack.

Claims

1. A device for securely performing a cryptographic operation involving a secret, comprising:

an input to receive a quantity to be processed;

a source of unpredictable information; and

a processor to perform the cryptographic operation using the secret and the received quantity, wherein the cryptographic operation is decorrelated from externally-monitorable signals produced through power consumption of the device by using the unpredictable information to select between different parallel processes for performing the cryptographic operation.

2. The device of claim 1, wherein using the unpredictable information to select between different parallel processes for performing the cryptographic operation causes the device to have unpredictable variations in power consumption.

3. A non-transitory computer readable medium including data that, when accessed by a processing device, cause the processing device to perform operations comprising:

receiving a quantity to be processed in a cryptographic operation involving secret data;

generating unpredictable information;

performing the cryptographic operation using the secret data and the received quantity; and

decorrelating the cryptographic operation from externally-monitorable signals produced through power consumption of the processing device, by using the unpredictable information to select between different parallel processes for performing the cryptographic operation.

4. The non-transitory computer readable medium of claim 3, wherein using the unpredictable information to select between different parallel processes for performing the cryptographic operation causes the processing device to have unpredictable variations in power consumption.

5. A method of securely performing a cryptographic processing operation in a device involving a secret, comprising:

receiving a quantity to be processed;

generating unpredictable information;

performing the cryptographic operation using the received quantity, the cryptographic operation including a permutation; and

decorrelating the cryptographic operation from externally-monitorable signals produced through power consumption of the device, wherein decorrelating the cryptographic operation includes;

generating a blinding factor based on the unpredictable information;

blinding a value with the blinding factor, the blinded value to be used in the permutation;

performing the permutation; and

unblinding the blinded value in the permutation.

6. A method for securely performing a cryptographic operation in a device involving a secret, comprising:

receiving a quantity to be processed;

generating unpredictable information;

generating an internal clock signal from an external clock signal, wherein generating the internal clock signal comprises using the unpredictable information to select a closest corresponding cycle of the external clock signal to be used as the internal clock signal, and further wherein the unpredictable information randomly varies the internal clock signal by adjusting at least one characteristic of the internal clock signal selected from the group consisting of frequency, drift, and jitter;

performing the cryptographic operation on the received quantity using the internal clock signal; and

decorrelating the cryptographic operation from externally-monitorable signals produced through power consumption of the device.