Multiwire linear equalizer for vector signaling code receiver
First Claim
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1. An apparatus comprising:
- a multi-wire communications medium comprising a plurality of wires; and
,a continuous time linear equalizing circuit comprising;
a plurality of matched transistors, each matched transistor of the plurality of matched transistors having an input corresponding to a respective wire of the multi-wire communications medium and having an output of a plurality of outputs representing the input signal minus a noise-induced common-mode signal; and
,a common-mode capacitance electrically interconnecting, via a common node, the plurality of matched transistors in a differential amplifier configuration with respect to noise-induced common-mode signals below a first cutoff frequency and electrically isolating the matched transistors in a non-differential amplifier configuration with respect to skew-induced common-mode signals above the first cutoff frequency.
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Abstract
Continuous-time linear equalization of received signals on multiple wire channels while maintaining accurate common mode signal values. Multiwire group signaling using vector signaling codes simultaneously transmits encoded values on multiple wires, requiring multiple receive signals to be sampled simultaneously to retrieve the full transmitted code word. By misaligning transitions on multiple wires, skew introduces a transient common mode signal component that is preserved by using frequency-selective common mode feedback at the receiver to obtain accurate sampling results.
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Citations
20 Claims
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1. An apparatus comprising:
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a multi-wire communications medium comprising a plurality of wires; and
,a continuous time linear equalizing circuit comprising; a plurality of matched transistors, each matched transistor of the plurality of matched transistors having an input corresponding to a respective wire of the multi-wire communications medium and having an output of a plurality of outputs representing the input signal minus a noise-induced common-mode signal; and
,a common-mode capacitance electrically interconnecting, via a common node, the plurality of matched transistors in a differential amplifier configuration with respect to noise-induced common-mode signals below a first cutoff frequency and electrically isolating the matched transistors in a non-differential amplifier configuration with respect to skew-induced common-mode signals above the first cutoff frequency. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method comprising:
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receiving signals from a plurality of wires of a multi-wire communications medium at a multi-input amplifier having a plurality of matched transistors; conveying noise-induced common-mode signals below a cutoff frequency as common-mode negative feedback to the plurality of matched transistors via a tunable resistor/capacitor (RC) network; and
,shunting skew-induced common-mode signals above the cutoff frequency to effective signal ground via the tunable RC network. - View Dependent Claims (12, 13, 14, 15)
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16. A method comprising:
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receiving a plurality of input signals at a plurality of gate terminals of a plurality of matched transistors, wherein at least one input signal is skewed with respect to at least one other input signal; providing at least one noise-induced common-mode signal to a common node connecting source terminals of the plurality of matched transistors, each of the at least one noise-induced common-mode signals provided as negative feedback to the plurality of matched transistors; shunting at least one skew-induced common-mode signal to system ground via a common-mode capacitance connecting the common node and system ground; and
,providing, at a plurality of drain terminals of the plurality of matched transistors, a plurality of output signals, each output signal corresponding to a respective input signal minus the noise-induced common-mode signal. - View Dependent Claims (17, 18, 19, 20)
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Specification