Non-deleterious technique for creating continuous conductive circuits upon the surfaces of a non-conductive substrate

• US 9,420,699 B2
• Filed: 12/19/2013
• Issued: 08/16/2016
• Est. Priority Date: 03/12/2010
• Status: Active Grant

• Current Assignee: Taiwan Green Point Enterprises Company Limited (Jabil Inc.)
• Original Assignee: Taiwan Green Point Enterprises Company Limited (Jabil Inc.)
• Inventors: Yi, Sheng-Hung, Liao, Pen-Yi
• Primary Examiner(s): NGUYEN, HOA CAO
• Application Number:
  US14/134,046
• Publication Number:
  US 20140102775A1
• Time in Patent Office: 971 Days
• Field of Search: 174/250, 174255-257
• US Class Current: 1/1
• CPC Class Codes: C25D 5/02 Electroplating of selected surface areas
• CPC Class Codes: C25D 7/00 Electroplating characterised by the article coated
• CPC Class Codes: H05K 2203/107 Using laser light shaping a substrate by laser ablation H05K3/0026
• CPC Class Codes: H05K 3/027 the conductive material being removed by irradiation, e.g. by photons, alpha or beta particles
• CPC Class Codes: H05K 3/185 by making a catalytic pattern by photo-imaging
• CPC Class Codes: H05K 3/188 by direct electroplating
• CPC Class Codes: H05K 3/24 Reinforcing the conductive pattern by solder coating H05K3/3457
• CPC Class Codes: Y10T 29/49126 Assembling bases
• CPC Class Codes: Y10T 29/49155 Manufacturing circuit on or in base
• CPC Class Codes: Y10T 29/49156 with selective destruction of conductive paths

Abstract

A non-deleterious method for producing a continuous conductive circuit upon a non-conductive substrate can begin with the application of a metallic base layer upon a surface of a non-conductive substrate. A circuit pattern can be created within the metallic base layer based upon a circuit design. The metallic base layer comprising the circuit pattern can be physically separated from the remainder of the metallic base layer on the non-conductive substrate. The region of the non-conductive substrate surface that encloses the circuit pattern can be called the plating region. The remainder of the non-conductive substrate surface can be called the non-plating region. A first metal layer can be added upon the metallic base layer. A second metal layer can be added upon the first metal layer of the plating region. The second metal layer can be electrically conductive and restricted from forming on the first metal layer of the non-plating region.

Claims

1. An electronic assembly comprising:

a non-conductive substrate;

a metallic base layer upon a portion of said non-conductive substrate, said metallic base layer consisting of one of palladium, rhodium, platinum, iridium, osmium, gold, and iron, wherein said metallic base layer has structural characteristics indicative of said metallic base layer being processed by a laser;

a first metal layer on top of said metallic base layer, wherein said first metal layer has structural characteristics indicative of said first metal layer being added using a chemical plating process; and

wherein structural characteristics indicative of the first metal layer being processed by the laser are absent; and

a second metal layer on top of said first metal layer, wherein said second metal layer has structural characteristics indicative of said second metal layer being added using an electroplating process.

2. The electronic assembly of claim 1, wherein said non-conductive substrate is non-planar.

3. The electronic assembly of claim 2, wherein said metallic base layer has structural characteristics indicative of said metallic base layer being added after said non-conductive substrate being prepared.

4. The electronic assembly of claim 2, wherein said metallic base layer has structural characteristics indicative of said metallic base layer being added by submerging said non-conductive substrate in an active metal solution, wherein said active metal solution contains metallic particles.

5. The electronic assembly of claim 2, wherein said metallic base layer has structural characteristics indicative of said metallic base layer being added by one of chemical vapor deposition (CVD), electrochemical deposition, atomic layer deposition, plating, and chemical solution deposition (CSD).

6. The electronic assembly of claim 1, wherein said non-conductive substrate is formed from at least one of the following materials:

a high-molecular polymer, glass, and a ceramic.

7. The electronic assembly of claim 6, wherein said metallic base layer has structural characteristics indicative of said metallic base layer being added after said non-conductive substrate being prepared.

8. The electronic assembly of claim 6, wherein said metallic base layer has structural characteristics indicative of said metallic base layer being added by submerging said non-conductive substrate in an active metal solution, wherein said active metal solution contains metallic particles.

9. The electronic assembly of claim 6, wherein said metallic base layer has structural characteristics indicative of said metallic base layer being added by one of chemical vapor deposition (CVD), electrochemical deposition, atomic layer deposition, plating, and chemical solution deposition (CSD).

10. The electronic assembly of claim 1, wherein said laser for processing said metallic base layer is a yttrium aluminum garnet (YAG) laser.

11. The electronic assembly of claim 10, wherein said metallic base layer has structural characteristics indicative of said metallic base layer being added after said non-conductive substrate being prepared.

12. The electronic assembly of claim 10, wherein said metallic base layer has structural characteristics indicative of said metallic base layer being added by submerging said non-conductive substrate in an active metal solution, wherein said active metal solution contains metallic particles.

13. The electronic assembly of claim 10, wherein said metallic base layer has structural characteristics indicative of said metallic base layer being added by one of chemical vapor deposition (CVD), electrochemical deposition, atomic layer deposition, plating, and chemical solution deposition (CSD).

14. The electronic assembly of claim 1, wherein said metallic base layer, said first metal layer and said second metal layer constitute a conductive circuit.

15. The electronic assembly of claim 14, wherein said metallic base layer has structural characteristics indicative of said metallic base layer being added after said non-conductive substrate being prepared.

16. The electronic assembly of claim 14, wherein said metallic base layer has structural characteristics indicative of said metallic base layer being added by submerging said non-conductive substrate in an active metal solution, wherein said active metal solution contains metallic particles.

17. The electronic assembly of claim 14, wherein said metallic base layer has structural characteristics indicative of said metallic base layer being added by one of chemical vapor deposition (CVD), electrochemical deposition, atomic layer deposition, plating, and chemical solution deposition (CSD).

18. The electronic assembly of claim 1, wherein said metallic base layer has structural characteristics indicative of said metallic base layer being added after said non-conductive substrate being prepared.

19. The electronic assembly of claim 1, wherein said metallic base layer has structural characteristics indicative of said metallic base layer being added by submerging said non-conductive substrate in an active metal solution, wherein said active metal solution contains metallic particles.

20. The electronic assembly of claim 1, wherein said metallic base layer has structural characteristics indicative of said metallic base layer being added by one of chemical vapor deposition (CVD), electrochemical deposition, atomic layer deposition, plating, and chemical solution deposition (CSD).