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Non-volatile memory for high rewrite cycles application

  • US 9,425,204 B2
  • Filed: 05/06/2014
  • Issued: 08/23/2016
  • Est. Priority Date: 09/27/2013
  • Status: Active Grant
First Claim
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1. A non-volatile memory cell comprising:

  • a coupling device formed on a first well, a second terminal of the coupling device is electrically coupled to a source line;

    a read device electrically directly connected to the coupling device, a first terminal of the read device is electrically coupled to a first bit line, a gate of the read device is electrically coupled to a first word line;

    a floating gate device formed on a second well;

    a program device electrically connected to the floating gate device and formed on the second well, a first terminal of the program device is electrically coupled to a second bit line, a gate of the program device is electrically coupled to a second word line; and

    an erase device formed on a third well, a first terminal of the erase device is electrically coupled to an erase line;

    wherein the coupling device, the floating gate device and the erase device are coupled by a common floating gate.

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