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Semiconductor device with low-K spacers

  • US 9,425,280 B2
  • Filed: 05/13/2015
  • Issued: 08/23/2016
  • Est. Priority Date: 10/22/2012
  • Status: Active Grant
First Claim
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1. A device, comprising:

  • a gate structure positioned above an active region defined in a semiconducting substrate, said gate structure comprising a gate insulation layer and a gate electrode, said gate insulation layer having two upstanding portions that are substantially vertically oriented relative to an upper surface of said substrate;

    a first layer of insulating material positioned above and covering at least a portion of said active region;

    a second layer of insulating material positioned above and covering at least a portion of said first layer of insulating material;

    a third layer of insulating material positioned above and covering at least a portion of said second layer of insulating material; and

    a low-k sidewall spacer positioned adjacent each of said vertically oriented upstanding portions of said gate insulation layer, wherein said low-k sidewall spacer contacts each of said first, second, and third layers of insulating material, wherein a portion of said low-k sidewall spacer extends into a recess that is positioned between said third layer of insulating material and said active region, said portion of said low-k sidewall spacer contacting a sidewall portion of said second layer of insulating material.

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