Distributed amplifier with improved stabilization
DCFirst Claim
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1. A distributed amplifier comprising:
- an input transmission line;
an output transmission line; and
a plurality of cascode amplifiers each coupled between the input transmission line and the output transmission line, wherein a first cascode amplifier of the plurality of cascode amplifiers comprises;
three or more field effect transistors (FETs) arranged in a stack, wherein the three or more FETs comprises a first FET, a second FET, and a third FET, wherein the first FET includes a gate coupled to the input transmission line, wherein the second FET is positioned between the first FET and the third FET in the stack, and wherein the third FET includes a drain coupled to the output transmission line; and
a first stabilization circuit coupled to the drain of the third FET,wherein the first FET is configured to generate an amplified signal by amplifying an input signal received at the gate of the first FET from the input transmission line, wherein the first FET is further configured to provide the amplified signal to the output transmission line through the second FET, from a source of the second FET to a drain of the second FET, and through the third FET, from a source of the third FET to the drain of the third FET.
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Abstract
A distributed amplifier with improved stabilization includes an input transmission circuit, an output transmission circuit, at least one cascade amplifier coupled between said input and output transmission circuits. Each cascade amplifier includes a common-gate configured transistor coupled to the output transmission circuit, and a common-source configured transistor coupled between the input transmission circuit and the common-gate configured transistor. The distributed amplifier also includes a non-parasitic resistance and capacitance coupled in series between a drain and a gate of at least one of the common-gate configured transistors for increasing the amplifier stability.
33 Citations
23 Claims
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1. A distributed amplifier comprising:
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an input transmission line; an output transmission line; and a plurality of cascode amplifiers each coupled between the input transmission line and the output transmission line, wherein a first cascode amplifier of the plurality of cascode amplifiers comprises; three or more field effect transistors (FETs) arranged in a stack, wherein the three or more FETs comprises a first FET, a second FET, and a third FET, wherein the first FET includes a gate coupled to the input transmission line, wherein the second FET is positioned between the first FET and the third FET in the stack, and wherein the third FET includes a drain coupled to the output transmission line; and a first stabilization circuit coupled to the drain of the third FET, wherein the first FET is configured to generate an amplified signal by amplifying an input signal received at the gate of the first FET from the input transmission line, wherein the first FET is further configured to provide the amplified signal to the output transmission line through the second FET, from a source of the second FET to a drain of the second FET, and through the third FET, from a source of the third FET to the drain of the third FET. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 21)
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11. A distributed amplifier comprising:
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an input transmission line; an output transmission line; and a plurality of cascode amplifiers each coupled between the input transmission line and the output transmission line, wherein a first cascode amplifier of the plurality of cascode amplifiers comprises; three or more field effect transistors (FETs) arranged in a stack, wherein the three or more FETs comprises a first FET, a second FET, and a third FET, wherein the first FET includes a gate coupled to the input transmission line, wherein the second FET is positioned between the first FET and the third FET in the stack, and wherein the third FET includes a drain coupled to the output transmission line; and a first stabilization circuit coupled to a drain of the second FET, wherein the first FET is configured to generate an amplified signal by amplifying an input signal received at the gate of the first FET from the input transmission line, wherein the first FET is further configured to provide the amplified signal to the output transmission line through the second FET, from a source of the second FET to the drain of the second FET, and through the third FET, from a source of the third FET to the drain of the third FET. - View Dependent Claims (12, 13, 14, 22)
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15. A distributed amplifier comprising:
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an input transmission line; an output transmission line; and a plurality of cascode amplifiers each coupled between the input transmission line and the output transmission line, wherein a first cascode amplifier of the plurality of cascode amplifiers comprises; three or more field effect transistors (FETs) arranged in a stack, wherein the three or more FETs comprises a first FET, a second FET, and a third FET, wherein the first FET includes a gate coupled to the input transmission line, wherein the second FET is positioned between the first FET and the third FET in the stack, and wherein the third FET includes a drain coupled to the output transmission line; and a first stabilization circuit coupled to a gate of the third FET, wherein the first stabilization circuit comprises a first resistor and a first capacitor electrically connected in series, wherein the first FET is configured to generate an amplified signal by amplifying an input signal received at the gate of the first FET from the input transmission line, wherein the first FET is further configured to provide the amplified signal to the output transmission line through the second FET, from a source of the second FET to a drain of the second FET, and through the third FET, from a source of the third FET to the drain of the third FET. - View Dependent Claims (16, 17, 18, 19, 20, 23)
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Specification