Semiconductor device and manufacturing method thereof

• US 9,429,807 B2
• Filed: 05/26/2015
• Issued: 08/30/2016
• Est. Priority Date: 05/09/2000
• Status: Expired due to Fees

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei
• Primary Examiner(s): Lee, Kyoung
• Application Number:
  US14/721,482
• Publication Number:
  US 20150346530A1
• Time in Patent Office: 462 Days
• US Class Current: 1/1
• CPC Class Codes: G02F 1/133305 Flexible substrates, e.g. plastics, organic film
• CPC Class Codes: G02F 1/133345 Insulating layers G02F1/1335, G02F1/1337, G02F1/135, G02F1/136 take precedence
• CPC Class Codes: G02F 1/133553 Reflecting elements associated to illuminating devices G02F1/133605
• CPC Class Codes: G02F 1/1337 Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
• CPC Class Codes: G02F 1/1339 Gaskets; Spacers; Sealing of cells
• CPC Class Codes: G02F 1/134309 characterised by their geometrical arrangement
• CPC Class Codes: G02F 1/13439 characterised by their electrical, optical, physical properties; materials therefor; method of making
• CPC Class Codes: G02F 1/136277 formed on a semiconductor substrate, e.g. of silicon
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: G02F 2203/03 scattering
• CPC Class Codes: H01L 2224/05568 the whole external layer protruding from the surface
• CPC Class Codes: H01L 2224/05573 Single external layer
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48464 the other connecting portion not on the bonding area also being a ball bond, i.e. ball-to-ball
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/73265 : Layer and wire connectors
• CPC Class Codes: H01L 25/18 : the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
• CPC Class Codes: H01L 27/12 : the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 27/1214 : comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/124 : with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1248 : with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 27/1288 : employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/78669 : with inverted-type structure, e.g. with bottom gate
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/07811 : Extrinsic, i.e. with electrical conductive fillers
• CPC Class Codes: H01L 33/0041 : characterised by field-effect operation

Abstract

A means of forming unevenness for preventing specular reflection of a pixel electrode, without increasing the number of process steps, is provided. In a method of manufacturing a reflecting type liquid crystal display device, the formation of unevenness (having a radius of curvature r in a convex portion) in the surface of a pixel electrode is performed by the same photomask as that used for forming a channel etch type TFT, in which the convex portion is formed in order to provide unevenness to the surface of the pixel electrode and give light scattering characteristics.

Claims

1. A semiconductor device comprising:

a first conductive film on a substrate;

an IC chip whose first electrode is connected to the first conductive film through a conductive particle;

a second conductive film connected to a second electrode of the IC chip through a conductive particle; and

an FPC connected to the second conductive film through a conductive particle,

wherein the first conductive film comprises a region overlapping with a sealing material.

2. The semiconductor device according to claim 1, further comprising:

a pixel portion located in a region surrounded by the sealing material,

wherein the first conductive film extends in the region surrounded by the sealing material.

3. The semiconductor device according to claim 1, further comprising:

a pixel portion located in a region surrounded by the sealing material,

wherein the pixel portion comprises a transistor electrically connected to a pixel electrode, and

wherein a coloring layer overlaps with a channel formation region of the transistor.

4. The semiconductor device according to claim 1, further comprising:

a pixel portion located in a region surrounded by the sealing material,

wherein the pixel portion comprises a transistor electrically connected to a pixel electrode, and

wherein a coloring layer overlaps with a channel formation region of the transistor and the pixel electrode.

5. The semiconductor device according to claim 1, further comprising:

a pixel portion located in a region surrounded by the sealing material,

wherein the pixel portion comprises a transistor electrically connected to a pixel electrode,

wherein a first coloring layer overlaps with a channel formation region of the transistor and the pixel electrode, and

wherein a second coloring layer overlaps with the channel formation region of the transistor.

6. The semiconductor device according to claim 1, further comprising:

a transistor located in a region surrounded by the sealing material,

wherein the transistor comprises;

a gate electrode;

a semiconductor film over the gate electrode, the semiconductor film comprising a first portion, a second portion, and a recessed portion interposed between the first portion and the second portion, wherein a thickness of the first portion is larger than a thickness of the recessed portion and a thickness of the second portion is larger than the thickness of the recessed portion; and

an insulating film over the semiconductor film, wherein the insulating film is in contact with a top surface of the first portion, a top surface of the second portion and a top surface of the recessed portion.

7. A semiconductor device comprising:

a first conductive film on a substrate;

an IC chip whose first electrode is connected to the first conductive film through a conductive particle;

a second conductive film connected to a second electrode of the IC chip through a conductive particle; and

an FPC connected to the second conductive film through a conductive particle,

wherein the first conductive film comprises a region overlapping with a sealing material, and

wherein the first conductive film and the second conductive film is a same layer.

8. The semiconductor device according to claim 7, further comprising:

a pixel portion located in a region surrounded by the sealing material,

wherein the first conductive film extends in the region surrounded by the sealing material.

9. The semiconductor device according to claim 7, further comprising:

a pixel portion located in a region surrounded by the sealing material,

wherein the pixel portion comprises a transistor electrically connected to a pixel electrode, and

wherein a coloring layer overlaps with a channel formation region of the transistor.

10. The semiconductor device according to claim 7, further comprising:

a pixel portion located in a region surrounded by the sealing material,

wherein the pixel portion comprises a transistor electrically connected to a pixel electrode, and

wherein a coloring layer overlaps with a channel formation region of the transistor and the pixel electrode.

11. The semiconductor device according to claim 7, further comprising:

a pixel portion located in a region surrounded by the sealing material,

wherein the pixel portion comprises a transistor electrically connected to a pixel electrode,

wherein a first coloring layer overlaps with a channel formation region of the transistor and the pixel electrode, and

wherein a second coloring layer overlaps with the channel formation region of the transistor.

12. The semiconductor device according to claim 7, further comprising:

a transistor located in a region surrounded by the sealing material,

wherein the transistor comprises;

a gate electrode;

a semiconductor film over the gate electrode, the semiconductor film comprising a first portion, a second portion, and a recessed portion interposed between the first portion and the second portion, wherein a thickness of the first portion is larger than a thickness of the recessed portion and a thickness of the second portion is larger than the thickness of the recessed portion; and

an insulating film over the semiconductor film, wherein the insulating film is in contact with a top surface of the first portion, a top surface of the second portion and a top surface of the recessed portion.