Active rectifier with delay locked loop to compensate for reverse current leakage and wireless power receiving apparatus including active rectifier with delay locked loop to compensate for reverse current leakage

• US 9,431,889 B2
• Filed: 08/29/2011
• Issued: 08/30/2016
• Est. Priority Date: 08/27/2010
• Status: Active Grant

• Current Assignee: Industry-University Cooperation Foundation Hanyang University, Samsung Electronics Co. Ltd.
• Original Assignee: Industry-University Cooperation Foundation Hanyang University, Samsung Electronics Co. Ltd.
• Inventors: Kim, Dong Zo, Hong, Young Tack, Choi, Jin Sung, Moon, Young Jin, Kwon, Sang Wook, Park, Yun Kwon, Yoo, Chang Sik, Park, Eun Seok, Kim, Ki Young, Ryu, Young Ho, Kim, Nam Yun, Roh, Yong Seong
• Primary Examiner(s): Tran, Nguyen
• Assistant Examiner(s): ROSARIO BENITEZ, GUSTAVO A
• Application Number:
  US13/219,842
• Publication Number:
  US 20120051109A1
• Time in Patent Office: 1,828 Days
• Field of Search: 363/81, 363/84, 363/87, 363/89, 363/125, 363/127
• US Class Current: 1/1
• CPC Class Codes: H02M 1/083 for the ignition at the zero crossing of the voltage or the current
• CPC Class Codes: H02M 7/217 using semiconductor devices only

Abstract

An active rectifier and a wireless power receiver including the active rectifier are provided. According to an aspect, an active rectifier may include: a first loop configured to provide voltage when the phase of an input signal is positive; and a second loop configured to provide voltage when the phase of the input signal is negative, wherein the first loop and the second loop include a delay locked loop configured to compensate for reverse current leakage due to a delay of a switch included therein.

Claims

1. An active rectifier comprising:

a first loop configured to provide a first voltage when a phase of an input signal is positive; and

a second loop configured to provide a second voltage when the phase of the input signal is negative,

wherein the first loop comprises;

a first switch configured to be turned on when the phase of the input signal is positive, based on a differential signal with respect to the input signal,

a first delay switch to be turned on when the phase of the input signal is positive, based on the differential signal with respect to the input signal,

a first delay locked loop configured to compensate for a reverse current leakage due to a delay of a switch, between when a phase of the differential signal is switched from positive to negative and when the first delay switch is turned on, by adding a first voltage offset to the phase of the differential signal, and

a capacitor configured to provide a voltage corresponding to substantially a maximum amplitude of the input signal,

wherein the first delay switch comprises;

a comparator configured to receive the differential signal and to output a predetermined voltage when the phase of the differential signal is negative;

a voltage buffer configured to store the predetermined voltage outputted from the comparator, and, when the stored voltage becomes a turn-on voltage, to output the turn-on voltage; and

a transistor configured to be turned on by the turn-on voltage outputted from the voltage buffer,

wherein the first delay locked loop is configured to provide the first voltage offset corresponding to a second delay occurring due to the comparator and the voltage buffer, and to add the first voltage offset to the phase of the differential signal inputted to the comparator, and

wherein the second loop comprises a second delay locked loop configured to compensate for a reverse current leakage due to a delay of a switch, between when the phase of the input signal is switched from positive to negative and when a second delay switch is turned on, by adding a second voltage offset to the phase of the input signal.

2. The active rectifier of claim 1, wherein the input signal is received from a source resonator through magnetic coupling.

3. The active rectifier of claim 1, wherein the first delay locked loop comprises:

a second comparator configured to receive the differential signal, and to output a predetermined voltage when the phase of the differential signal is negative;

a delay unit configured to receive the output of the voltage buffer, and to output the received output after adding a predetermined delay of the second comparator to the received output;

a phase detecting unit configured to detect a phase difference between an output signal of the second comparator and an output signal of the delay unit;

an electric charge pump configured to provide the voltage offset corresponding to the phase difference; and

a delay compensation unit configured to add the voltage offset to the phase of the differential signal inputted to the comparator.

4. The active rectifier of claim 1, wherein the second loop comprises:

a second switch configured to be turned on when the phase of the input signal is negative;

the second delay switch configured to be turned on when the phase of the input signal is negative; and

a capacitor configured to provide a voltage corresponding to a maximum amplitude of the input signal.

5. The active rectifier of claim 4, wherein the second delay switch comprises:

a comparator configured to receive the input signal, and to output a predetermined voltage when the phase of the input signal is negative;

a voltage buffer configured to store the predetermined voltage outputted from the comparator, and, when the stored voltage becomes a turn-on voltage, to output the turn-on voltage; and

a transistor configured to be turned on by the turn-on voltage outputted from the voltage buffer,

wherein the second delay locked loop is configured to provide the second voltage offset corresponding to a second delay occurring due to the comparator and the voltage buffer, and to add the second voltage offset to the phase of the input signal inputted to the comparator.

6. The active rectifier of claim 5, wherein the second delay locked loop comprises:

a second comparator configured to receive the input signal, and to output a second predetermined voltage when the phase of the input signal is negative;

a delay unit configured to receive the output of the voltage buffer, and to output a received output after adding a predetermined delay of the second comparator to the received output;

a phase detecting unit configured to detect a phase difference the output signal of the second comparator and the output signal of the delay unit;

an electric charge pump configured to provide the second voltage offset corresponding to the phase difference; and

a delay compensation unit configured to add the second voltage offset to the phase of the input signal inputted to the comparator.

12. The active rectifier of claim 1, wherein the first and second loops include the first delay locked loop and the second delay locked loop, respectively, which are configured to compensate for a reverse current leakage, using the first or second voltage offset corresponding to a delay obtained using the first delay locked loop and the second delay locked loop.

7. An active rectifier comprising:

a first circuit configured to provide a first voltage when a phase of an input signal is positive; and

a second circuit configured to provide a second voltage when the phase of the input signal is negative,

wherein the first circuit comprises;

a switch configured to be turned on when the phase of the input signal is positive, based on a differential signal with respect to the input signal,

a delay switch to be turned on when the phase of the input signal is positive, based on the differential signal with respect to the input signal,

a first delay locked loop configured to compensate for a reverse current leakage due to a delay of a switch, between when a phase of a differential signal is switched from positive to negative and when the first delay switch is turned on, by adding a first voltage offset to the phase of the differential signal, and

a first capacitor configured to provide a voltage corresponding to substantially a maximum amplitude of the input signal,

wherein the delay switch comprises;

a comparator configured to receive the differential signal and to output a predetermined voltage when the phase of the differential signal is negative;

a voltage buffer configured to store the predetermined voltage outputted from the comparator, and, when the stored voltage becomes a turn-on voltage, to output the turn-on voltage; and

a transistor configured to be turned on by the turn-on voltage outputted from the voltage buffer,

wherein the delay locked circuit is configured to provide the first or second voltage offset corresponding to a second delay occurring due to the comparator and the voltage buffer, and to add the first or second voltage offset to the phase of the differential signal inputted to the comparator, and

wherein the second circuit comprises;

a second delay locked loop configured to compensate for a reverse current leakage due to a delay of a switch, between when the phase of the input signal is switched from positive to negative and when a second delay switch is turned on, by adding a second voltage offset to the phase of the input signal, and

a second capacitor configured to provide a voltage corresponding to substantially a maximum amplitude of the input signal.

8. The active rectifier of claim 7, wherein the at least one switch comprises a transistor.

9. The active rectifier of claim 8, wherein the transistor comprises a PMOS or NMOS transistor.

10. The active rectifier of claim 7, wherein the delay locked circuit comprises:

a second comparator configured to receive the differential signal, and to output a second predetermined voltage when the phase of the differential signal is negative;

a delay unit configured to receive the output of the voltage buffer, and to output a received output after adding a predetermined delay of the second comparator to the received output;

a phase detecting unit configured to detect a phase difference between the output signal of the second comparator and the output signal of the delay unit;

an electric charge pump configured to provide the first voltage offset corresponding to the phase difference; and

a delay compensation unit configured to add the first voltage offset to the phase of the differential signal inputted to the comparator.

11. An electronic device comprising the active rectifier of claim 7.

13. An active rectifier comprising:

a first loop configured to provide a first voltage when the phase of an input signal is positive; and

a second loop, separate and distinct from the first loop, configured to provide a second voltage when the phase of the input signal is negative, wherein the first loop comprises;

a first switch configured to be turned on when the phase of the input signal is positive, based on a differential signal with respect to the input signal, a first delay switch to be turned on when the phase of the input signal is positive, based on the differential signal with respect to the input signal, and a capacitor configured to provide a voltage corresponding to substantially a maximum amplitude of the input signal, wherein the first delay switch comprises;

a comparator configured to receive the differential signal and to output a predetermined voltage when the phase of the differential signal is negative;

a voltage buffer configured to store the predetermined voltage outputted from the comparator, and, when the stored voltage becomes a turn-on voltage, to output the turn-on voltage; and

a transistor configured to be turned on by the turn-on voltage outputted from the voltage buffer, wherein the first loop comprises a first delay locked loop configured to compensate for a reverse current leakage due to a delay of the transistor and provide the first voltage offset corresponding to a second delay occurring due to the comparator and the voltage buffer, and to add the first voltage offset to the phase of the differential signal inputted to the comparator, and wherein the second loop comprises a second delay locked loop configured to compensate for a reverse current leakage due to a delay of a switch, between when the phase of the input signal is switched from positive to negative and when a second delay switch is turned on, by adding a second voltage offset to the phase of the input signal.