Distributed load balancer node architecture
First Claim
1. A device, comprising;
- a first network interface controller (NIC) configured to receive packets from and transmit packets onto a first network;
a second NIC configured to receive packets from and transmit packets onto a second network; and
a multicore packet processor comprising;
a first receive core configured to receive packets from the first NIC and, for each received packet, output the packet to one of a plurality of output queues of the first receive core according to a hash function applied to source and destination address information of the packet;
a second receive core configured to receive packets from the second NIC and, for each received packet, output the packet to one of a plurality of output queues of the second receive core according to a hash function applied to source and destination address information of the packet;
a first transmit core configured to output processed packets to the first NIC, the first transmit core coupled to a respective plurality of input queues to the first transmit core;
a second transmit core configured to output processed packets to the second NIC, the second transmit core coupled to a respective plurality of input queues to the second transmit core; and
a plurality of worker cores each coupled to a respective one of the plurality of output queues of the first receive core and to a respective one of the plurality of output queues of the second receive core, each worker core also coupled to a respective one of the plurality of input queues of the first transmit core and to a respective one of the plurality of input queues of the second transmit core, wherein each worker core is configured to;
read packets from its respective ones of the output queues of the first receive core and the second receive core;
for each packet, determine if the packet is to be accepted for processing; and
for each accepted packet;
perform one or more processing tasks on the packet;
determine, according to a protocol of the packet, that either the first transmit core or the second transmit core is to output the packet; and
output the processed packet to the respective input queue of the determined transmit core.
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Accused Products
Abstract
A distributed load balancer in which a router receives packets from at least one client and routes packet flows to multiple load balancer (LB) nodes, which in turn distribute the packet flows among multiple server nodes. Each LB node may serve in ingress, egress, and/or flow tracker roles. Each LB node may include a first network interface controller (NIC) that faces the router and a second NIC that faces the server nodes. Each LB node may implement a core packet processing architecture in which packets received at the NICs are distributed among non-blocking input queues of a set of worker cores by receiver cores for the NICs, processed from the input queues by the worker cores, and placed on non-blocking input queues of transmit cores for the NICs.
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Citations
20 Claims
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1. A device, comprising;
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a first network interface controller (NIC) configured to receive packets from and transmit packets onto a first network; a second NIC configured to receive packets from and transmit packets onto a second network; and a multicore packet processor comprising; a first receive core configured to receive packets from the first NIC and, for each received packet, output the packet to one of a plurality of output queues of the first receive core according to a hash function applied to source and destination address information of the packet; a second receive core configured to receive packets from the second NIC and, for each received packet, output the packet to one of a plurality of output queues of the second receive core according to a hash function applied to source and destination address information of the packet; a first transmit core configured to output processed packets to the first NIC, the first transmit core coupled to a respective plurality of input queues to the first transmit core; a second transmit core configured to output processed packets to the second NIC, the second transmit core coupled to a respective plurality of input queues to the second transmit core; and a plurality of worker cores each coupled to a respective one of the plurality of output queues of the first receive core and to a respective one of the plurality of output queues of the second receive core, each worker core also coupled to a respective one of the plurality of input queues of the first transmit core and to a respective one of the plurality of input queues of the second transmit core, wherein each worker core is configured to; read packets from its respective ones of the output queues of the first receive core and the second receive core; for each packet, determine if the packet is to be accepted for processing; and for each accepted packet; perform one or more processing tasks on the packet; determine, according to a protocol of the packet, that either the first transmit core or the second transmit core is to output the packet; and output the processed packet to the respective input queue of the determined transmit core. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A multicore packet processor, comprising:
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one or more hardware receive cores each configured to receive packets from one of one or more network interface controllers (NICs), each NIC configured to receive packets from and transmit packets onto one of one or more networks, each receive core coupled to a respective plurality of output queues, each receive core configured to, for each received packet, output the packet to one of the plurality of output queues of the receive core according to a hash function applied to source and destination address information of the packet; one or more hardware transmit cores each configured to output processed packets to one of the one or more NICs, each transmit core coupled to a plurality of input queues; and a plurality of hardware worker cores each coupled to a respective one of the plurality of output queues of each of the one or more receive cores and each coupled to a respective one of the plurality of input queues of each of the one or more transmit cores, each worker core configured to; perform one or more processing tasks on packets read from the respective output queues of the receive cores, wherein one of the one or more processing tasks determines if the packets are accepted by the worker core; and for each accepted packet; determine one of the one or more transmit cores according to a protocol of the packet; and output the processed packet to the respective input queue of the determined transmit core. - View Dependent Claims (11, 12, 13, 14, 15, 16)
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17. A method, comprising:
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receiving, at each of two or more receive cores, packets from a respective one of two or more network interface controllers (NICs), wherein at least two of the NICs face different networks; determining, by each of the receive cores, a particular one of a plurality of worker cores for each packet according to a hash function applied to source and destination address information of the packet; and outputting, by each of the receive cores, each packet onto one of a plurality of input queues to the determined worker core for the respective packet, wherein each receive core outputs packets onto a different one of the plurality of input queues to each worker core; and processing, by each of the plurality of worker cores, packets from the plurality of input queues to the respective worker core, wherein said processing comprises, for at least one packet on each worker core; determining that the packet is accepted by the worker core; determining one of two or more transmit cores for the packet according to a protocol of the packet; and outputting the packet onto one of a plurality of input queues to the determined transmit core; wherein each worker core outputs packets onto a different one of the plurality of input queues to each transmit core; and wherein each transit core reads packets from the respective plurality of input queues and writes the packets to a respective one of the two or more NICS. - View Dependent Claims (18, 19, 20)
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Specification