Integrated vibration measurement and analysis system

• US 9,435,684 B2
• Filed: 11/14/2013
• Issued: 09/06/2016
• Est. Priority Date: 08/16/2010
• Status: Active Grant

• Current Assignee: Computational Systems Incorporated (Emerson Electric Company)
• Original Assignee: Computational Systems Incorporated (Emerson Electric Company)
• Inventors: Baldwin, Joseph C.
• Primary Examiner(s): NGHIEM, MICHAEL P
• Application Number:
  US14/079,690
• Publication Number:
  US 20140067289A1
• Time in Patent Office: 1,027 Days
• Field of Search: 702/56, 702/185
• US Class Current: 1/1
• CPC Class Codes: G01H 1/003 of rotating machines G01H1/10 takes precedence
• CPC Class Codes: G01H 17/00 Measuring mechanical vibrations or ultrasonic, sonic or infrasonic waves, not provided for in the preceding groups see provisionally also G01H1/00
• CPC Class Codes: G01M 99/005 Testing of complete machines, e.g. washing-machines or mobile phones testing of machine parts G01M13/00; testing of electric apparatus or components G01R31/50
• CPC Class Codes: G01N 2291/011 Velocity or travel time
• CPC Class Codes: G01N 2291/0258 Structural degradation, e.g. fatigue of composites, ageing of oils
• CPC Class Codes: G01N 29/11 by measuring attenuation of acoustic waves
• CPC Class Codes: G01N 29/14 using acoustic emission techniques echo of particles G01N29/046; measuring mechanical vibrations or acoustic waves in solids in general G01H1/00
• CPC Class Codes: G01N 29/449 Statistical methods not provided for in G01N29/4409, e.g. averaging, smoothing and interpolation

Abstract

A vibration data collection system performs an integration or differentiation process on incoming digitized vibration data in real time. The system uses a digital Infinite Impulse Response (IIR) filter running at the input data rate to provide the integration or differentiation function. With this approach, the system reduces hardware complexity and data storage requirements. Also, the system provides the ability to directly integrate or differentiate stored time waveforms without resorting to FFT processing methods.

Claims

1. A real-time signal conversion apparatus for use in measuring machine characteristics that are indicative of a machine fault condition or machine performance, the signal conversion apparatus comprising:

a first sensor for sensing a machine characteristic at a first position and generating a first analog signal;

a second sensor for sensing a machine characteristic at a second position and generating a second analog signal;

analog-to-digital conversion (ADC) circuits comprising at least;

a first ADC circuit for sampling the first analog signal to generate a first digital signal; and

a second ADC circuit for sampling the second analog signal to generate a second digital signal,

wherein the first and second digital signals are indicative of machine performance or a machine fault condition;

an integrated circuit component having at least two parallel channels for simultaneously processing the first digital signal in parallel with the second digital signal, the first digital signal in parallel with the first digital signal, or the second digital signal in parallel with the second digital signal, the at least two parallel channels including;

a first channel for processing the first digital signal or the second digital signal; and

a second channel for processing the first digital signal or the second digital signal; and

a cross-point switching device that is operable to provide the first digital signal to the first or second channels, and to provide the second digital signal to the first or second channels;

wherein the first and second channels each include;

a first integrator for integrating the first or second digital signals;

a first integrator bypass switch for selectively bypassing the first integrator for applications in which a first stage of integration is not needed;

a second integrator in series with the first integrator, the second integrator for integrating the first or second digital signals; and

a second integrator bypass switch for selectively bypassing the second integrator for applications in which a second stage of integration is not needed.

2. The real-time signal conversion apparatus of claim 1 wherein the first digital signal is a first acceleration signal and the second digital signal is a second acceleration signal, and wherein:

the cross-point switching device is operated in the first setting to direct the first acceleration signal to the first channel and to the second channel;

the first integrator bypass switch of the first channel is set to not bypass the first integrator of the first channel, and the second integrator bypass switch of the first channel is set to not bypass the second integrator of the first channel;

the first integrator of the first channel performs a single integration of the first acceleration signal to generate a first velocity signal, and the second integrator of the first channel performs a single integration of the first velocity signal to generate a first displacement signal, resulting in the first displacement signal being output from the first channel;

the first integrator bypass switch of the second channel is set to not bypass the first integrator of the second channel, and the second integrator bypass switch of the second channel is set to bypass the second integrator of the second channel; and

the first integrator of the second channel performs a single integration of the first acceleration signal to generate a first velocity signal, resulting in the first velocity signal being output from the second channel.

3. The real-time signal conversion apparatus of claim 1 wherein the first digital signal is a first acceleration signal and the second digital signal is a second acceleration signal, and wherein:

the cross-point switching device is operated in the first setting to direct the first acceleration signal to the first channel and to the second channel;

the first integrator bypass switch of the first channel is set to bypass the first integrator of the first channel, and the second integrator bypass switch of the first channel is set to bypass the second integrator of the first channel, resulting in the first acceleration signal being output from the first channel;

the first integrator bypass switch of the second channel is set to not bypass the first integrator of the second channel, and the second integrator bypass switch of the second channel is set to bypass the second integrator of the second channel; and

the first integrator of the second channel performs a single integration of the first acceleration signal to generate a first velocity signal, resulting in the first velocity signal being output from the second channel.

4. The real-time signal conversion apparatus of claim 1 wherein the first digital signal is a first acceleration signal and the second digital signal is a second acceleration signal, and wherein:

the cross-point switching device is operated in the first setting to direct the first acceleration signal to the first channel and to the second channel;

the first integrator bypass switch of the first channel is set to not bypass the first integrator of the first channel, and the second integrator bypass switch of the first channel is set to bypass the second integrator of the first channel;

the first integrator of the first channel performs a double integration of the first acceleration signal to generate a first displacement signal, resulting in the first displacement signal being output from the first channel;

the first integrator bypass switch of the second channel is set to not bypass the first integrator of the second channel, and the second integrator bypass switch of the second channel is set to bypass the second integrator of the second channel; and

the first integrator of the second channel performs a single integration of the first acceleration signal to generate a first velocity signal, resulting in the first velocity signal being output from the second channel.

5. The real-time signal conversion apparatus of claim 1 wherein one or both of the first and second integrators comprise a digital infinite impulse response filter running at an input sampling rate of the one or more ADC circuits, thereby reducing data storage requirements.