Method for manufacturing a semiconductor device

• US 9,437,440 B2
• Filed: 10/25/2013
• Issued: 09/06/2016
• Est. Priority Date: 11/21/2012
• Status: Active Grant

• Current Assignee: Infineon Technologies Dresden GmbH & Co. KG (Infineon Technologies AG)
• Original Assignee: Infineon Technologies Dresden GmbH (Infineon Technologies AG)
• Inventors: Sorschag, Kurt, Sarlette, Daniel, Braun, Felix, Heller, Marcel, Kaiser, Dieter, Meusel, Ingo, Lemke, Marko, Mauder, Anton, Strack, Helmut
• Primary Examiner(s): Stultz, Jessica
• Assistant Examiner(s): Maruf, Sheikh
• Application Number:
  US14/063,362
• Publication Number:
  US 20140141602A1
• Time in Patent Office: 1,047 Days
• Field of Search: 438/285, 438/259, 438/270, 438/429, 438/580, 438/504, 438/700, 257/494, 257/471, 257/336, 257/331, 257/E21.214, 257/E21.305
• US Class Current: 1/1
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02658 Pretreatments cleaning in general H01L21/02041
• CPC Class Codes: H01L 21/306 Chemical or electrical treatment, e.g. electrolytic etching to form insulating layers H01L21/31
• CPC Class Codes: H01L 21/30604 Chemical etching
• CPC Class Codes: H01L 21/311 Etching the insulating layers by chemical or physical means H01L21/31058 takes precedence
• CPC Class Codes: H01L 29/0657 characterised by the shape of the body
• CPC Class Codes: H01L 29/66348 with a recessed gate
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/66795 with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/7827 Vertical transistors H01L29/7802, H01L29/78642 take precedence

Abstract

A method for producing a semiconductor device is provided. The method includes: forming in a semiconductor substrate a plurality of semiconductor mesas extending to an upper side so that adjacent semiconductor mesas are spaced apart from each other by one of a substantially empty trench and a trench substantially filled with a sacrificial layer selectively etchable with respect to the semiconductor mesas; forming a support structure mechanically connecting the semiconductor mesas spaced apart from each other by one of the substantially empty trench and the trench substantially filled with the sacrificial layer; and processing the semiconductor substrate from the upper side while the semiconductor mesas are mechanically connected via the support structure.

Claims

1. A method for forming a semiconductor device, the method comprising:

forming in a semiconductor substrate a plurality of semiconductor mesas extending to an upper side so that adjacent semiconductor mesas are spaced apart from each other by one of a substantially empty trench and a trench substantially filled with a sacrificial layer selectively etchable with respect to the semiconductor mesas;

forming a support structure mechanically connecting the semiconductor mesas; and

processing the semiconductor substrate from the upper side while the semiconductor mesas are mechanically connected via the support structure; and

wherein the support structure is formed to partially cover the upper side of the semiconductor substrate and partially expose the upper side of the semiconductor substrate, and wherein processing the semiconductor substrate comprises performing semiconductor processing on material that is underneath the support structure.

2. The method of claim 1, wherein forming the plurality of semiconductor mesas and forming the support structure comprises a common etching process.

3. The method of claim 1, wherein forming the plurality of semiconductor mesas comprises at least one of:

providing a semiconductor substrate comprising a semiconductor layer extending to the upper side;

etching trenches from the upper side to form the plurality of semiconductor mesas which are, in a vertical cross-section substantially orthogonal to the upper side, spaced apart from each other by the trenches;

etching wide trenches from the upper side into the semiconductor layer so that first semiconductor mesas are formed which are, in a vertical cross-section substantially orthogonal to the upper side, separated from each other by the wide trenches;

forming the sacrificial layers at sidewalls of the wide trenches;

performing a selective epitaxial growth process to form second semiconductor mesas in the wide trenches; and

etching wide trenches from the upper side into the semiconductor layer to form the first semiconductor mesas which are separated from each other by the wide trenches and to form semiconductor portions connecting adjacent pairs of the first semiconductor mesas.

4. The method of claim 1, further comprising at least one of

at least partly replacing the sacrificial layers by dielectric layers;

at least partly filling the trenches with a solid material; and

partly removing the support structure.

5. The method of claim 1, wherein processing the semiconductor substrate comprises at least one of at least partly removing the sacrificial layers to recess at least portions of the trenches, sidewalls of the trenches and/or bottom walls of the trenches, implanting into the sidewalls and/or bottom walls of the trenches, rinsing at least the portions of the trenches and drying at least the portions of the trenches.

6. The method of claim 1, wherein the semiconductor substrate is provided with semiconductor mesas having in the vertical cross-section an aspect ratio of at least about 20.

7. The method of claim 1, wherein the support structure comprises poly-silicon, carbon, or diamond-like carbon, and/or wherein the support structure is made of one material.

8. The method of claim 1, wherein the plurality of semiconductor mesas and/or the semiconductor substrate comprise a first monocrystalline semiconductor material;

and wherein the sacrificial layer comprise a dielectric material, carbon, diamond-like carbon, a photo resist, a polycrystalline semiconductor material, an amorphous semiconductor material and/or a second monocrystalline semiconductor material different to the first monocrystalline semiconductor material.

15. The method of claim 1, wherein processing the semiconductor substrate comprises etching the sacrificial layer to expose sidewalls of the first and second semiconductor mesas while the semiconductor mesas are mechanically connected via the support structure.

9. A method for forming a semiconductor device, the method comprising:

providing a semiconductor substrate having an upper side and comprising a semiconductor layer extending to the upper side;

etching trenches from the upper side into the semiconductor layer so that semiconductor mesas comprising sidewalls are formed which are separated from each other by the trenches, each of the trenches comprising a bottom wall;

forming at the upper side a support structure mechanically connecting the semiconductor mesas; and

implanting dopants from the upper side into the bottom walls and/or the sidewalls while the semiconductor mesas are mechanically connected via the support structure.

10. The method of claim 9, further comprising at least partly removing the support structure.

11. The method of claim 9, wherein forming the support structure comprises at least one of

depositing a negative resist;

radiating the negative resist to form a resist structure which is at least partly cured;

rinsing the trenches with a film developer; and

drying the semiconductor substrate.

12. The method of claim 11, wherein the negative resist is radiated with a radiation having a wavelength larger than a distance between adjacent semiconductor mesas.

13. The method of claim 9, further comprising at least one of:

etching the support structure; and

removing the support structure.

14. The method of claim 9, wherein the trenches are etched such that the semiconductor mesas have, in a cross-section substantially orthogonal to the upper side, a width of at most about 150 nm.

16. The method of claim 9, wherein the support structure is formed to partially cover the upper side of the semiconductor substrate and partially expose the upper side of the semiconductor substrate, and wherein implanting dopants comprises implanting dopants into semiconductor material underneath the support structure.

17. The method of claim 16, wherein implanting dopants comprises implanting dopants into bottom walls of the trenches, and wherein implanting dopants comprises an angled implantation process so as to implant dopants into portions of the bottom walls which are shadowed by the support structure.