Universal artificial intelligence engine for autonomous computing devices and software applications

• US 9,443,192 B1
• Filed: 08/30/2015
• Issued: 09/13/2016
• Est. Priority Date: 08/30/2015
• Status: Active Grant

• Current Assignee: Jasmin Cosic
• Original Assignee: Jasmin Cosic
• Inventors: Cosic, Jasmin
• Primary Examiner(s): CHANG, LI WU
• Application Number:
  US14/839,982
• Time in Patent Office: 380 Days
• Field of Search: None
• US Class Current: 1/1
• CPC Class Codes: A63F 13/422 automatically for the purpose of assisting the player, e.g. automatic braking in a driving game
• CPC Class Codes: G06N 20/00 Machine learning
• CPC Class Codes: G06N 3/006 based on simulated virtual individual or collective life forms, e.g. social simulations or particle swarm optimisation [PSO]
• CPC Class Codes: G06N 3/02 Neural networks
• CPC Class Codes: G06N 3/042 Knowledge-based neural networks; Logical representations of neural networks
• CPC Class Codes: G06N 5/048 Fuzzy inferencing

Abstract

Aspects of the disclosure generally relate to computing devices and may be generally directed to devices, systems, methods, and/or applications for learning the operation of a computing device or software application, storing this knowledge in a knowledgebase, neural network, or other repository, and enabling autonomous operation of the computing device or software application with partial, minimal, or no user input.

Claims

1. A system for autonomous application operating, the system implemented on one or more computing devices, the system comprising:

a computing device including one or more processor circuits coupled to a memory unit;

an application, running on the one or more processor circuits, for performing operations on the computing device;

an interface configured to receive a first instruction set and a second instruction set, the interface further configured to receive a new instruction set, wherein the first, the second, and the new instruction sets are executed by the one or more processor circuits and are part of the application for performing operations on the computing device;

a neural network configured to store at least one portion of the first instruction set into a first node of the neural network and at least one portion of the second instruction set into a second node of the neural network, the neural network comprising a plurality of portions of instruction sets, wherein the first instruction set includes a comparative instruction set whose stored portions can be used for comparisons with portions of the new instruction set, and the second instruction set includes an anticipatory instruction set whose stored portions can be used for anticipation of an instruction set subsequent to the new instruction set; and

a decision-making unit configured to;

compare at least one portion of the new instruction set with at least one portion of the first instruction set from the neural network, and

determine that there is a match between at least a threshold number of portions of the new instruction set and at least a threshold number of portions of the first instruction set from the neural network,

wherein the one or more processor circuits execute the second instruction set from the neural network in response to the determination of the decision-making unit.

2. The system of claim 1, wherein the interface, the neural network, and the decision-making unit are part of, operating on, or coupled to the one or more processor circuits.

3. The system of claim 1, wherein the receiving the first, the second, and the new instruction sets includes at least one of:

a manual, an automatic, a dynamic, or a just in time (JIT) instrumentation of the application.

4. The system of claim 1, wherein the receiving the first, the second, and the new instruction sets includes a tracing of the application or the one or more processor circuits.

5. The system of claim 1, wherein the receiving the first, the second, and the new instruction sets includes receiving the first, the second, and the new instruction sets at the application'"'"'s runtime.

6. The system of claim 1, wherein the computing device includes a device whose operation is affected at least in part by the one or more processor circuits.

7. The system of claim 1, wherein the interface, the neural network, and the decision-making unit are part of, operating on, or coupled to the computing device.

8. The system of claim 1, wherein the first node is part of a first layer of the neural network and the second node is part of a second layer of the neural network.

9. The system of claim 8, wherein the first layer includes a comparative layer and the second layer includes an anticipatory layer.

10. The system of claim 1, wherein the first node of the neural network is connected to the second node of the neural network by a connection.

11. The system of claim 1, wherein the neural network includes a remote or a global neural network operating on a remote computing device.

12. The system of claim 1, wherein the neural network includes a data structure comprising a plurality of nodes interconnected by one or more connections.

13. The system of claim 1, wherein the determining that there is a match between at least the threshold number of portions of the new instruction set and at least the threshold number of portions of the first instruction set from the neural network includes determining that there is a match between at least one portion of the new instruction set and at least one portion of the first instruction set from the neural network.

14. The system of claim 1, wherein the application includes at least one of:

a web browser, a word processing application, an operating system, a media application, a global positioning system application, a game application, a robot control application, a database application, a program hardcoded on the one or more processor circuits, a program hardcoded on a hardware element, or an executable program.

15. A non-transitory computer storage medium having a computer program stored thereon, the program comprising instructions that when executed by one or more computing devices cause the one or more computing devices to perform operations comprising:

receiving a first instruction set and a second instruction set, wherein the first and the second instruction sets are executed by one or more processor circuits and are part of an application for performing operations on a computing device;

storing at least one portion of the first instruction set into a first node of a neural network and at least one portion of the second instruction set into a second node of the neural network, the neural network comprising a plurality of portions of instruction sets, wherein the first instruction set includes a comparative instruction set whose stored portions can be used for comparisons with portions of a new instruction set, and the second instruction set includes an anticipatory instruction set whose stored portions can be used for anticipation of an instruction set subsequent to the new instruction set;

receiving the new instruction set, wherein the new instruction set is executed by the one or more processor circuits and is part of the application for performing operations on the computing device;

comparing at least one portion of the new instruction set with at least one portion of the first instruction set from the neural network;

determining that there is a match between at least a threshold number of portions of the new instruction set and at least a threshold number of portions of the first instruction set from the neural network; and

executing the second instruction set from the neural network by the one or more processor circuits in response to the determining that there is a match between at least the threshold number of portions of the new instruction set and at least the threshold number of portions of the first instruction set from the neural network.

16. The non-transitory computer storage medium of claim 15, wherein the computing device includes a device whose operation is affected at least in part by the one or more processor circuits.

17. The non-transitory computer storage medium of claim 15, wherein the neural network includes a data structure comprising a plurality of nodes interconnected by one or more connections.

18. A method comprising:

(a) receiving, by one or more processor circuits via an interface, a first instruction set and a second instruction set, wherein the first and the second instruction sets are executed by the one or more processor circuits and are part of an application for performing operations on a computing device;

(b) storing at least one portion of the first instruction set into a first node of a neural network and at least one portion of the second instruction set into a second node of the neural network, the neural network comprising a plurality of portions of instruction sets, wherein the first instruction set includes a comparative instruction set whose stored portions can be used for comparisons with portions of a new instruction set, and the second instruction set includes an anticipatory instruction set whose stored portions can be used for anticipation of an instruction set subsequent to the new instruction set, the storing of (b) caused by the one or more processor circuits;

(c) receiving, by the one or more processor circuits via the interface, the new instruction set, wherein the new instruction set is executed by the one or more processor circuits and is part of the application for performing operations on the computing device;

(d) comparing at least one portion of the new instruction set with at least one portion of the first instruction set from the neural network, the comparing of (d) performed by the one or more processor circuits;

(e) determining that there is a match between at least a threshold number of portions of the new instruction set and at least a threshold number of portions of the first instruction set from the neural network, the determining of (e) performed by the one or more processor circuits; and

(f) executing the second instruction set from the neural network by the one or more processor circuits in response to the determining of (e).

19. The method of claim 18, wherein the computing device includes a device whose operation is affected at least in part by the one or more processor circuits.

20. The method of claim 18, wherein the neural network includes a data structure comprising a plurality of nodes interconnected by one or more connections.