Auto-suspend and auto-resume operations for a multi-die NAND memory device to reduce peak power consumption

• US 9,443,600 B2
• Filed: 03/28/2013
• Issued: 09/13/2016
• Est. Priority Date: 03/28/2013
• Status: Active Grant

• Current Assignee: Intel NDTM US LLC (Intel Corporation)
• Original Assignee: Intel Corporation
• Inventors: Ghalam, Ali, Nobunaga, Dean, Guo, Jason
• Primary Examiner(s): Tran, Andrew Q
• Application Number:
  US13/852,992
• Publication Number:
  US 20140293704A1
• Time in Patent Office: 1,265 Days
• Field of Search: 365/227, 365/229, 365/228, 365/226, 365/230.03, 365/51, 365/63
• US Class Current: 1/1
• CPC Class Codes: G06F 1/3275 Power saving in memory, e.g. RAM, cache
• CPC Class Codes: G11C 16/225 Preventing erasure, programming or reading when power supply voltages are outside the required ranges
• CPC Class Codes: G11C 16/30 Power supply circuits
• CPC Class Codes: G11C 5/148 Details of power up or power down circuits, standby circuits or recovery circuits
• CPC Class Codes: G11C 8/12 Group selection circuits, e.g. for memory block selection, chip selection, array selection
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A method and apparatus that controls a peak-current condition in a multi-die memory, such as a solid-state drive, by determining by at least one die of the multi-die memory whether a subsequent memory operation is a high-current memory operation, such as an operation to enable a charge pump of the die, an operation to charge a bit line of the die, or a program/erase loop operation, or a combination thereof. The die enters a suspended-operation mode if the subsequent memory operation is determined to be a high current memory operation. Operation is resumed by the die in response to a resume operation event, such as, but not limited to, a command specifically address to the die, an indication from another die that a high-current memory operation is complete. Once operation is resumed, the die performs the high-current memory operation.

Claims

1. A method, comprising:

determining by at least one die of a multi-die memory whether a subsequent memory operation is a high-current memory operation;

entering a suspended-operation mode by the at least one die if the subsequent memory operation is a high-current memory operation;

resuming operation by the at least one die in response to a resume operation event;

performing the subsequent memory operation;

receiving a counter-reset signal from a controller of the multi-die memory;

resetting an internal-die counter in response to the counter-reset signal;

counting a first clock signal using the internal-die counter;

resuming the operation by the at least one die in response to a predetermined count by the internal-die counter, the predetermined count of the internal-die counter comprising the resume operation event; and

performing the subsequent memory operation.

2. The method according to claim 1, wherein said determining by the at least one die whether the subsequent memory operation is a high-current memory operation comprises determining whether the subsequent memory operation is an operation to enable a charge pump of the at least one die, an operation to charge a bit line of the at least one die, or a program/erase loop operation, or a combination thereof.

3. The method according to claim 1, wherein said determining by the at least one die whether the subsequent memory operation is a high-current memory operation further comprises outputting an indication to the multi-die memory of the subsequent memory operation.

4. The method according to claim 1, further comprising:

receiving a command from a controller of the multi-die memory to enter a mode to determine whether the subsequent memory operation is a high-current memory operation; and

in response to receiving the command, performing said determining by the at least one die of a multi-die memory whether the subsequent memory operation is a high-current memory operation.

5. The method according to claim 4, further comprising

receiving a resume command from the controller specifically addressed to the at least one die, the resume command comprising the resume operation event;

in response to the resume command, performing said resuming operation by the at least one die in response to the resume command specifically addressed to the at least one die; and

performing the subsequent memory operation.

6. The method according to claim 1, wherein said performing the subsequent memory operation by the at least one die comprises delaying a predetermined period of time after receiving the second indication before preforming the subsequent memory operation.

7. The method according to claim 1, further comprising:

receiving a command from a controller of the multi-die memory to enter a mode to determine whether the subsequent memory operation is a high-current memory operation;

toggling a signal line in response to said determining by the at least one die whether the subsequent memory operation is a high-current memory operation;

performing the said resuming operation by the at least one die in response to a predetermined number of times the signal line is toggled, the predetermined number of times the signal line is togged comprising the resume operation event;

performing the subsequent memory operation; and

toggling the signal line in response to performing the subsequent memory operation.

8. The method according to claim 1, wherein the multi-die memory comprises a solid-state drive.

9. A method of controlling a peak-current condition in a solid-state drive, the method comprising:

determining by at least one die of the solid-state drive whether a subsequent memory operation is a high-current memory operation, the high-current memory operation comprising an operation to enable a charge pump of the at least one die, an operation to charge a bit line of the at least one die, or a program/erase loop operation, or a combination thereof;

entering a suspended-operation mode by the at least one die if the subsequent memory operation is a high current memory operation;

resuming operation by the at least one die in response to a resume operation event;

performing the subsequent memory operation;

receiving a counter-reset signal from a controller of the solid-state drive;

resetting an internal-die counter in response to the counter-reset signal; and

counting a first clock signal using the internal-die counter;

resuming the operation by the at least one die in response to a predetermined count by the internal-die counter, the predetermined count of the internal-die counter comprising the resume operation event; and

performing the subsequent memory operation.

10. The method according to claim 9, further comprising:

receiving a command from a controller of the solid-state drive to determine whether the subsequent memory operation is a high-current memory operation; and

in response to receiving the command, determining by the at least one die of a multi-die memory whether the subsequent memory operation is a high-current memory operation.

11. The method according to claim 10, further comprising:

receiving a resume command from the controller of the solid-state drive specifically addressed to the at least one die, the resume command comprising the resume operation event;

in response to the resume command, performing said resuming operation by the at least one die in response to the resume command specifically addressed to the at least one die; and

performing the subsequent memory operation.

12. The method according to claim 9, wherein determining by the at least one die whether the subsequent memory operation is a high-current memory operation further comprises outputting an indication to a multi-die memory of the subsequent memory operation.

13. The method according to claim 9, further comprising:

receiving a command from a controller of the solid-state drive to enter a mode to determine whether the subsequent memory operation is a high-current memory operation;

toggling a signal line in response to said determining by the at least one die whether the subsequent memory operation is a high-current memory operation;

performing said resuming operation by the at least one die in response to a predetermined number of times the signal line is toggled, the predetermined number of times the signal line is togged comprising the resume operation event;

performing the subsequent memory operation; and

toggling the signal line in response to performing the subsequent memory operation.

14. An apparatus, comprising:

at least one die of a multi-die memory configured to determine whether a subsequent memory operation is a high-current memory operation, the high-current memory operation comprising an operation to enable a charge pump of the at least one die, an operation to charge a bit line of the at least one die, or a program/erase loop operation, or a combination thereof;

the at least one die further configured to;

enter a suspended-operation mode by the at least one die if the subsequent memory operation is a high current memory operation,

toggle a signal line in response to the determining by the at least one die whether the subsequent memory operation is a high-current memory operation,

resume operation in response to a predetermined number of times the signal line is toggled by other dies of the multi-die memory, the predetermined number of times the signal line is toggled comprising a resume operation event,

perform the subsequent memory operation, and

toggle the signal line in response to performing the subsequent memory operation.

15. The apparatus according to claim 14, wherein the at least one die is further configured to receive a counter-reset signal from a controller of the multi-die memory, and in response to receiving the counter-reset signal, determine whether the subsequent memory operation is a high-current memory operation.

16. The apparatus according to claim 14, wherein the multi-die memory comprises a solid-state drive.