Method of manufacturing semiconductor device including transistor and resistor incorporating hydrogen in oxide semiconductor

• US 9,443,888 B2
• Filed: 08/18/2014
• Issued: 09/13/2016
• Est. Priority Date: 12/24/2008
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Koyama, Jun, Sakata, Junichiro, Maruyama, Tetsunori, Imoto, Yuki, Asano, Yuji, Koezuka, Junichi
• Primary Examiner(s): Tran, Minh-Loan
• Assistant Examiner(s): KHAN, FARID H
• Application Number:
  US14/461,938
• Publication Number:
  US 20140357019A1
• Time in Patent Office: 757 Days
• US Class Current: 1/1
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 27/127 with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
• CPC Class Codes: H01L 28/20 Resistors
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

The silicon nitride layer 910 formed by plasma CVD using a gas containing a hydrogen compound such as silane (SiH₄) and ammonia (NH₃) is provided on and in direct contact with the oxide semiconductor layer 905 used for the resistor 354, and the silicon nitride layer 910 is provided over the oxide semiconductor layer 906 used for the thin film transistor 355 with the silicon oxide layer 909 serving as a barrier layer interposed therebetween. Therefore, a higher concentration of hydrogen is introduced into the oxide semiconductor layer 905 than into the oxide semiconductor layer 906. As a result, the resistance of the oxide semiconductor layer 905 used for the resistor 354 is made lower than that of the oxide semiconductor layer 906 used for the thin film transistor 355.

Claims

1. A method for manufacturing a semiconductor device including a transistor and a passive element connected to the transistor, the method comprising the steps of:

forming an oxide semiconductor layer over a substrate;

etching part of the oxide semiconductor layer to form a first layer for the transistor and a second layer for the passive element;

forming an oxide insulating layer over and in contact with the first layer and the second layer;

etching part of the oxide insulating layer to expose at least a portion of the second layer; and

forming a nitride insulating layer over and in contact with the oxide insulating layer,

wherein the nitride insulating layer contacts the exposed portion of the second layer so that hydrogen contained in the nitride insulating layer is introduced into the exposed portion and resistance of the exposed portion is lowered.

2. The method according to claim 1, wherein the nitride insulating layer is a silicon nitride layer formed by a plasma CVD method.

3. The method according to claim 1, wherein the passive element is a resistor element.

4. The method according to claim 1, wherein the oxide semiconductor layer comprises indium and zinc.

5. The method according to claim 1, wherein the semiconductor device is a display device.

6. A method for manufacturing a semiconductor device including a transistor and a passive element connected to the transistor, the method comprising the steps of:

forming an oxide semiconductor layer over a substrate, the oxide semiconductor layer including a first region for the transistor and a second region for the passive element;

forming an oxide insulating layer over and in contact with the oxide semiconductor layer in the first region and the second region;

etching part of the oxide insulating layer to expose at least a portion of the oxide semiconductor layer in the second region; and

forming a nitride insulating layer over and in contact with the oxide insulating layer,

wherein the nitride insulating layer contacts the exposed portion of the oxide semiconductor layer in the second region so that hydrogen contained in the nitride insulating layer is introduced into the exposed portion and resistance of the exposed portion is lowered.

7. The method according to claim 6, wherein the nitride insulating layer is a silicon nitride layer formed by a plasma CVD method.

8. The method according to claim 6, wherein the passive element is a resistor element.

9. The method according to claim 6, wherein the oxide semiconductor layer comprises indium and zinc.

10. The method according to claim 6, wherein the semiconductor device is a display device.

11. A method for manufacturing a semiconductor device including a transistor and a passive element connected to the transistor, the method comprising the steps of:

forming a gate electrode over a substrate;

forming a gate insulating film over the gate electrode;

forming an oxide semiconductor layer over the gate insulating film;

etching part of the oxide semiconductor layer to form a first layer for the transistor and a second layer for the passive element, wherein the first layer overlaps the gate electrode;

forming a source electrode and a drain electrode connected to the first layer;

forming an oxide insulating layer over and in contact with the first layer, the source electrode, and the drain electrode, and the second layer;

etching part of the oxide insulating layer to expose at least a portion of the second layer;

forming a nitride insulating layer over and in contact with the oxide insulating layer; and

forming a pixel electrode connected to the semiconductor device,

wherein the nitride insulating layer contacts the exposed portion of the second layer so that hydrogen contained in the nitride insulating layer is introduced into the exposed portion and resistance of the exposed portion is lowered.

12. The method according to claim 11, wherein the nitride insulating layer is a silicon nitride layer formed by a plasma CVD method.

13. The method according to claim 11, wherein the passive element is a resistor element.

14. The method according to claim 11, wherein the oxide semiconductor layer comprises indium and zinc.

15. The method according to claim 11, wherein the semiconductor device is a display device.

16. A method for manufacturing a semiconductor device including a transistor and a passive element connected to the transistor, the method comprising the steps of:

forming a gate electrode over a substrate;

forming a gate insulating film over the gate electrode;

forming an oxide semiconductor layer including a first region for the transistor and a second region for the passive element over the gate insulating film, wherein the first region overlaps the gate electrode;

forming a source electrode and a drain electrode connected to the oxide semiconductor layer in the first region;

forming an oxide insulating layer over and in contact with the oxide semiconductor layer in the first region, the source electrode, and the drain electrode, and the oxide semiconductor layer in the second region;

etching part of the oxide insulating layer to expose at least a portion of the oxide semiconductor layer in the second region;

forming a nitride insulating layer over and in contact with the oxide insulating layer; and

forming a pixel electrode connected to the semiconductor device,

wherein the nitride insulating layer contacts the exposed portion of the oxide semiconductor layer in the second region so that hydrogen contained in the nitride insulating layer is introduced into the exposed portion and resistance of the exposed portion is lowered.

17. The method according to claim 16, wherein the nitride insulating layer is a silicon nitride layer formed by a plasma CVD method.

18. The method according to claim 16, wherein the passive element is a resistor element.

19. The method according to claim 16, wherein the oxide semiconductor layer comprises indium and zinc.

20. The method according to claim 16, wherein the semiconductor device is a display device.