Current sensing multiple output current stimulators

• US 9,446,241 B2
• Filed: 03/17/2014
• Issued: 09/20/2016
• Est. Priority Date: 03/15/2013
• Status: Active Grant

• Current Assignee: Alfred E. Mann Foundation For Scientific Research
• Original Assignee: Alfred E. Mann Foundation For Scientific Research
• Inventors: Lee, Edward K. F.
• Primary Examiner(s): Patton, Amanda
• Assistant Examiner(s): Edwards, Philip C
• Application Number:
  US14/217,321
• Publication Number:
  US 20140277268A1
• Time in Patent Office: 918 Days
• Field of Search: 607/34
• US Class Current: 1/1
• CPC Class Codes: A61N 1/36003 of motor muscles, e.g. for walking assistance
• CPC Class Codes: A61N 1/3605 Implantable neurostimulators for stimulating central or peripheral nerve system
• CPC Class Codes: A61N 1/36071 Pain
• CPC Class Codes: A61N 1/36125 Details of circuitry or electric components
• CPC Class Codes: A61N 1/36146 specified by the stimulation parameters
• CPC Class Codes: H03K 3/012 Modifications of generator to improve response time or to decrease power consumption
• CPC Class Codes: H03K 3/023 by the use of differential amplifiers or comparators, with internal or external positive feedback

Abstract

A multiple output current stimulator circuit with fast turn on time is described. At least one pair of input side and output side transistors is arranged in a current mirror connected to a supply transistor by cascode coupling. The output side transistor supplies stimulation current to an electrode in contact with tissue. An operational amplifier connected to a reference voltage and to the output side transistor drives the supply transistor to maintain the voltage at the output side transistor equal to the reference voltage. The at least one pair of transistors includes multiple pairs of transistors whose output side transistors drive respective electrodes with stimulation currents. The stimulator determines the initiation and duration of stimulation current pulses supplied to each electrode. At circuit activation, large currents are generated which discharge capacitances in the output side transistors causing rapid output side transistor turn on.

Claims

1. A multiple output current stimulator circuit comprising:

a reference voltage source to provide a reference voltage;

a plurality of input side transistors;

a plurality of output side transistors current mirror coupled to respective ones of the input side transistors, the output side transistors coupled together to provide a common sensing voltage, each one of the output side transistors having a current output terminal for providing a respective output current;

a supply transistor switchably coupled in cascode arrangement between each input side transistor and a predetermined voltage port;

a differential amplifier comprising;

a first input coupled to the reference voltage;

a second input coupled to the common sensing voltage; and

an output arranged to drive the supply transistor as a function of the difference between the reference voltage and the common sensing voltage; and

a switching control circuit configured to selectively activate each one of the input side transistors so as to cause the corresponding current mirrored output side transistor to provide a respective output current in accordance with the corresponding input side transistor current.

2. The stimulator circuit of claim 1 further comprising a current source and a first resistor coupled to the current source to provide the reference voltage.

3. The stimulator circuit of claim 2 further comprising a second resistor coupled between a voltage source and the output side transistors to thereby provide the common sensing voltage.

4. The stimulator circuit of claim 3 further comprising a third resistor coupled between the voltage source and the input side transistors for providing current to each input side transistor.

6. The stimulator of claim 3 wherein, the input side transistors and the output side transistors are MOSFET transistors having a width (W) and a length (L), wherein each transistor W/L ratio is configured to be equal to 1:

L and wherein the ratio of the resistance values of the third resistor and the second resistor is configured to be equal to L;

1 to thereby provide a supply transistor current equal to the current source current multiplied by the ratio of the first and second resistor divided by L.

7. The stimulator of claim 1 wherein the predetermined voltage port comprises ground.

8. The stimulator of claim 1 wherein the predetermined voltage port comprises a voltage source.

9. The stimulator of claim 1 further comprising a first plurality of switches each switch of the first plurality of switches connected between the supply transistor and a respective input side transistor, said switching control circuit configured to activate said first plurality of switches in accordance with a stimulation protocol so as to cause the corresponding current mirrored output side transistor to provide a respective output current.

10. The stimulator of claim 9 further comprising a second plurality of switches each switch of the second plurality of switches connected between a voltage source and a respective input side transistor, said switching control circuit configured to activate said second plurality of switches in accordance with a stimulation protocol so as to cause the corresponding current mirrored output side transistor to suspend delivery of a respective output current.

11. The stimulator of claim 10 wherein said switching control circuit controls the states of the first plurality of switches and the second plurality of switches in a complementary fashion such that when a switch in the first plurality of switches is activated a corresponding switch in the second plurality of switches is de-activated and when a switch in the first plurality of switches is de-activated a corresponding switch in the second plurality of switches is activated.

12. The stimulator of claim 11 wherein the switching control circuit controls the reference voltage source such that the reference voltage is provided upon activation of at least one of the switches in the first plurality of switches to thereby discharge capacitances related to the output side transistor corresponding to said at least one preselected switch.

13. The stimulator of claim 12 wherein upon providing the reference voltage, the differential amplifier drives the supply transistor so as to discharge capacitances related to the output side transistor corresponding to said at least one preselected switch.

5. The stimulator circuit of 3 wherein the sum of the respective output currents is equal to the current delivered by the current source multiplied by a constant K, wherein the constant K equals the ratio of the first resistor to the second resistor.

14. A multiple output current stimulator circuit comprising:

a voltage reference source to provide a reference voltage;

at least one input side transistor;

at least one output side transistor current mirror coupled to the at least one input side transistor, the at least one output side transistor providing a common sensing voltage, the at least one output side transistor having a current output terminal for providing an output current;

a supply transistor switchably coupled in cascode arrangement between the at least one input side transistor and a voltage port;

a differential amplifier comprising;

a first input coupled to the reference voltage;

a second input coupled to the common sensing voltage; and

an output arranged to drive the supply transistor as a function of the difference between the reference voltage and the common sensing voltage; and

a switching control circuit configured to activate the at least one input side transistor so as to cause the current mirrored at least one output side transistor to provide an output current in accordance with the corresponding at least one input side transistor current.

15. The stimulator of claim 14 wherein the voltage port is ground.

16. The stimulator of claim 14 wherein the voltage port is a voltage source.