Collecting memory operand access characteristics during transactional execution

• US 9,448,939 B2
• Filed: 06/30/2014
• Issued: 09/20/2016
• Est. Priority Date: 06/30/2014
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Greiner, Dan F., Gschwind, Michael Karl, Salapura, Valentina, Slegel, Timothy J.
• Primary Examiner(s): CHOE, YONG J
• Application Number:
  US14/318,771
• Publication Number:
  US 20150378896A1
• Time in Patent Office: 813 Days
• US Class Current: 1/1
• CPC Class Codes: G06F 12/0811 with multilevel cache hierarchies
• CPC Class Codes: G06F 12/084 with a shared cache
• CPC Class Codes: G06F 12/0842 for multiprocessing or multitasking
• CPC Class Codes: G06F 12/0875 with dedicated cache, e.g. instruction or stack
• CPC Class Codes: G06F 2212/1016 Performance improvement
• CPC Class Codes: G06F 2212/1041 Resource optimization
• CPC Class Codes: G06F 2212/281 Single cache
• CPC Class Codes: G06F 2212/452 Instruction code
• CPC Class Codes: G06F 2212/62 Details of cache specific to multiprocessor cache arrangements
• CPC Class Codes: G06F 9/467 Transactional memory G06F9/528 takes precedence

Abstract

A transactional execution of a set of instructions in a transaction of a program may be initiated to collect memory operand access characteristics of a set of instructions of a transaction during the transactional execution. The memory operand access characteristics may be stored upon a termination of the transactional execution of the set of instructions. The memory operand access characteristics may include an address of an accessed storage location, a count of a number of times the storage location is accessed, a purpose value indicating whether the storage location is accessed for a fetch, store, or update operation, a count of a number of times the storage location is accessed for one or more of a fetch, store, or update operation; a translation mode in which the storage location is accessed; and an addressing mode.

Claims

1. A computer system for collecting memory operand access characteristics during transactional execution (TX) of a transaction, the computer system comprising:

a memory; and

a processor in communications with the memory, wherein the computer system is configured to perform a method, said method comprising;

initiating, by a processor, a transactional execution of a set of instructions in a transaction of a program;

collecting, by the processor, memory operand access characteristics of the set of instructions during the transactional execution; and

storing, by the processor, the memory operand access characteristics upon a termination of the transactional execution of the set of instructions;

wherein the initiating is performed by execution of a TBEGIN instruction in the program, by the processor, the TBEGIN instruction specifying a parameter, the parameter designating a storage location for the storing of the memory operand access characteristics.

2. The computer system of claim 1, wherein the termination of the transactional execution is caused by any one of execution of a terminating instruction and aborting the transactional execution.

3. The computer system of claim 1, wherein the storing further comprises saving, by the processor, the collected memory operand access characteristics in a list of objects.

4. The computer system of claim 3, wherein a maximum size of the list of objects is fixed, or is determined by the program.

5. The computer system of claim 3, the list comprises one or more entries corresponding to any one or more of:

an address of a storage location of an operand accessed by a transactional instruction;

a count of a number of times a storage location of an operand is accessed by a transactional instruction;

a purpose value indicating whether the storage location of an operand, accessed by a transactional instruction, is accessed for a fetch, store, or update operation;

a count of a number of times a storage location of an operand is accessed by a transactional instruction;

a translation mode of an operand accessed by a transactional instruction; and

an addressing mode of an operand accessed by a transactional instruction.

6. The computer system of claim 1, wherein the stored memory operand access characteristics are encoded in 24-bit, 31-bit, or 64-bit addresses.

7. The computer system of claim 6, wherein the memory operand access characteristics are encoded relative to a base address.

8. A computer program product for collecting memory operand access characteristics during transactional execution (TX) of a transaction, the computer program product comprising:

a tangible and non-transitory computer readable storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method, the method comprising;

initiating, by the processor, a transactional execution of a set of instructions in a transaction of a program;

collecting, by the processor, memory operand access characteristics of the set of instructions during the transactional execution; and

storing, by the processor, the memory operand access characteristics upon a termination of the transactional execution of the set of instructions

wherein the initiating is performed by execution, by the processor, of a TBEGIN instruction in the program, the TBEGIN instruction specifying a parameter, the parameter designating a storage location for the storing of the memory operand access characteristics.

9. The computer program product of claim 8, wherein the termination of the transactional execution by the processor is caused by any one of executing a terminating instruction and aborting the transactional execution.

10. The computer program product of claim 8, wherein the storing further comprises saving, by the processor, the collected memory operand access characteristics in a list of objects.

11. The computer program product of claim 10, wherein a maximum size of the list of objects is fixed or is determined by the program.

12. The computer program product of claim 10, wherein, for a storage location accessed by an instruction of the transaction, the list comprises one or more entries corresponding to any one or more of:

an address of a storage location of an operand accessed by a transactional instruction;

a count of a number of times a storage location of an operand is accessed by a transactional instruction;

a purpose value indicating whether the storage location of an operand, accessed by a transactional instruction, is accessed for a fetch, store, or update operation;

a count of a number of times a storage location of an operand is accessed by a transactional instruction;

a translation mode of an operand accessed by a transactional instruction; and

an addressing mode of an operand accessed by a transactional instruction.