Power management

• US 9,449,702 B1
• Filed: 07/08/2014
• Issued: 09/20/2016
• Est. Priority Date: 07/08/2014
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Inventors: Pinkovich, Dani, Weingarten, Hanan
• Primary Examiner(s): Hidalgo, Fernando
• Application Number:
  US14/326,142
• Time in Patent Office: 805 Days
• Field of Search: 365/185.11, 365/185.17, 365/185.33, 365/226, 365/227, 365/229, 365/185.18, 324/76.11
• US Class Current: 1/1
• CPC Class Codes: G01R 21/06 by measuring current and voltage G01R21/08 - G01R21/133 take precedence
• CPC Class Codes: G11C 16/30 Power supply circuits

Abstract

According to an embodiment of the invention there may be provided a method for measuring, by a power measurement circuit of a memory controller, a power consumption of a flash memory unit coupled to the memory controller to provide power measurements; wherein the memory controller further may include a read circuit, a write circuit, an erase circuit and a processor.

Claims

1. A method for power measurements of a flash memory unit, the method comprises measuring, by a power measurement circuit of a memory controller, a power consumption of a flash memory unit coupled to the memory controller to provide power measurements;

wherein the memory controller further comprises a read circuit, a write circuit, an erase circuit and a processor;

wherein the power measurement circuit comprises a voltmeter, a resistor, a switching circuit and a power output;

wherein method further comprises;

providing, via the power output, power to the memory controller;

measuring by the voltmeter a voltage developed on the resistor; and

selectively coupling, by the switching circuit, the resistor to the power output.

2. A method for controlling a flash memory unit, the method comprises:

receiving or generating, by a memory controller, power measurements indicative of power consumed by a flash memory unit coupled to the memory controller;

wherein at least one of the following is true;

(i) the method comprises applying multiple sets of operational parameters during an obtaining of the power measurement results; and

determining a validity of each set of operational parameters in response to the power measurements; and

(ii) the method comprises evaluating a wear level of at least one group of cells of the flash memory unit in response to the power measurements and in response to wear-power mapping information that maps power consumptions and wear levels.

3. The method according to claim 2 comprising controlling an operation of at least one of the read circuit, the write circuit and the erase circuit in response to the power measurements.

4. The method according to claim 2 comprising determining the at least one operational parameter in response to the power measurements;

wherein the at least one of (a) a write operation executed by the write circuit, (b) an erase operation executed by the erase circuit, and (c) a read operation executed by the read circuit is responsive to the at least one operational parameter.

5. The method according to claim 2 comprising determining at least one operational parameter in response to the power measurements to impose a limitation on the power consumption of the flash memory unit.

6. The method according to claim 2 comprising determining at least one operational parameter in response to the power measurements to comply with a power consummation constraint related to the power consumption of the flash memory unit and at least one out of:

a reliability constraint related to a reliability of content stored in the flash memory unit;

a timing constraint related to a duration of at least one operation out of a read operation, a programming operation and an erase operation, and a wear constraint related to a wear level of cells of the flash memory unit.

7. The method according to claim 2 comprising evaluating a functionality of the flash memory unit in response to the power measurements.

8. The method according to claim 2 comprising applying the multiple sets of operational parameters during the obtaining of the power measurement results;

and determining the validity of each set of operational parameters in response to the power measurements.

9. The method according to claim 8 comprising disqualifying a set of operational parameters when power measurements obtained when the set of operations were applied by the memory controller indicate of a power consumption that deviates from an allowable power consumption of the flash memory unit.

10. The method according to claim 8 comprising disqualifying a set of operational parameters when power measurements obtained when the set of operations were applied by the memory controller indicate that an instruction to perform an operation out of a read operation, write operation and erase operation was not performed.

11. The method according to claim 2 comprising evaluating a temperature of the flash memory unit in response to the power measurements and in response to temperature-power mapping information that maps power consumptions and temperature.

12. The method according to claim 2 comprising evaluating the wear level of the at least one group of cells of the flash memory unit in response to the power measurements and in response to the wear-power mapping information that maps power consumptions and wear levels.

13. The method according to claim 12 comprising generating the wear-power mapping information.

14. The method according to claim 2 comprising performing memory management operations in response to the power measurements.

15. The method according to claim 2 comprising electing groups of flash memory cells to be written by the write circuit in response to the power measurements.

16. The method according to claim 2 comprising controlling an operation of at least one of the read circuit, the write circuit and the erase circuit in response to the power measurements and in response to a state of a power supply unit that is arranged to provide power to at least one out of the memory controller and the flash memory unit.

17. The method according to claim 16 comprising defining different tradeoffs between power consumption parameters and other operational parameters at different states of the power supply unit.

18. The method according to claim 17 wherein other operational parameters are selected of a group consisting of (i) a reliability of content stored in the flash memory unit, (ii) a duration of at least one operation out of a read operation, a programming operation and an erase operation, and (iii) a wear resulting from the at least one operation.

19. The method according to claim 16 comprising determining, in response to the state of the power supply, whether to write data into a flash memory page of the flash memory unit without buffering the data in a non-volatile buffer.

20. The method according to claim 2 comprising measuring power consumptions of multiple flash memory units that are coupled to the memory controller to provide the power measurements;

wherein the multiple flash memory units comprise the flash memory unit.

21. The method according to claim 20 comprising differentiating between power measurements related to different flash memory units by comparing the power measurements to profiles of power consumptions of the different flash memory units.

22. The method according to claim 20 comprising performing input/output operations with different flash memory units in a non-overlapping manner.

23. A memory controller, the memory controller comprises a read circuit, a write circuit, an erase circuit, a power measurement circuit and a processor;

wherein the power measurement circuit is arranged to measure a power consumption of a flash memory unit coupled to the memory controller to provide power measurements; and

wherein at least one of the following is true;

(i) the memory controller is configured to apply multiple sets of operational parameters during an obtaining of the power measurement results; and

determine a validity of each set of operational parameters in response to the power measurements; and

(ii) the power measurement circuit comprises a voltmeter, a resistor, a switching circuit and a power output, wherein memory controller is configured to provide, via the power output, power;

wherein the voltmeter is configured to measure a voltage developed on the resistor; and

wherein the switching circuit is configured to selectively couple the resistor to the power output.

24. A non-transitory computer readable medium that stores instructions that once executed by a memory controller cause the memory controller to perform the steps of measuring a power consumption of a flash memory unit coupled to the memory controller to provide power measurements;

wherein the memory controller further comprises a read circuit, a write circuit, an erase circuit and a processor;

wherein at least one of the following is true;

(i) the non-transitory computer readable medium stores instructions that once executed by the memory controller cause the memory controller to apply multiple sets of operational parameters during an obtaining of the power measurement results; and

determine a validity of each set of operational parameters in response to the power measurements; and

(ii) the non-transitory computer readable medium stores instructions that once executed by the memory controller cause the memory controller to evaluate a wear level of at least one groups of cells of the flash memory unit in response to the power measurements and in response to wear-power mapping information that maps power consumptions and wear levels.

25. A memory controller that comprises a read circuit, a write circuit, an erase circuit, a power measurement circuit and a processor;

wherein the power measurement circuit is arranged to measure a power consumption of a flash memory unit coupled to the memory controller to provide power measurements;

wherein the power measurement circuit comprises a voltmeter, a resistor, a switching circuit and a power output, wherein power output is to provide power to the memory controller, wherein the voltmeter is arranged to measure a voltage developed on the resistor;

wherein the switching circuit is arranged to selectively couple the resistor to the power output.